[Bug target/54974] New: [ARM] Incorrect placement of constant pools

["mans at mansr dot com" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54974

             Bug #: 54974
           Summary: [ARM] Incorrect placement of constant pools
    Classification: Unclassified
           Product: gcc
           Version: 4.8.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: mans@mansr.com


Created attachment 28483
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=28483
Test case

If the following conditions are true, a constant pool is placed too far from an
LDR instruction accessing it:

- Compiling to Thumb2.
- There is no unconditional branch within 4k of the LDR instruction.
- At least one of:
  * The LDR instruction is not at a 4-byte aligned address.
  * There is an instruction boundary 4094 bytes from the value of PC
    at the LDR.

The problem here is twofold:

1. The base address of a PC-relative LDR in Thumb2 is the address of the
   instruction plus 4, rounded down to a multiple of 4.  The calculation
   for the valid range fails to take this rounding into account.

2. The constant pool is (rightly) 4-byte aligned.  When scanning the
   instructions for a suitable location, the possible need for padding
   is not considered.

The problem can be seen by compiling the attached preprocessed source using
flags "-mthumb -march=armv7-a -mfpu=vfpv3-d16 -mfloat-abi=hard -O0 -fPIC".