This is the mail archive of the gcc-bugs@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug libgomp/50175] data race with OMP barrier


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50175

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |jakub at gcc dot gnu.org,
                   |                            |rth at gcc dot gnu.org

--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> 2011-08-24 14:55:18 UTC ---
If this is about bar->arrived writes, then I don't see any races.
During the lifetime of a barrier, in the first phase arrived is incremented by
each thread, guarded by bar->mutex1 lock.  The threads then unlock bar->mutex1
lock, except for the last thread which keeps it locked and decrements
bar->arrived again, then, still with bar->mutex1 locked wakes up all the other
threads which then either atomically, or guarded with bar->mutex2 lock,
decrement bar->arrived again.  The last of those threads then posts to
bar->sem2
semaphore on which the thread holding bar->mutex1 is waiting before unlocking
that lock.  Thus, I don't see how the first phase (where bar->arrived
adjustments are done guarded with bar->mutex1 lock) can overlap with the second
phase (where it is decremented atomically or with mutex2).  Not even the second
phase with following first phase.  Thus I think valgrind is wrong about this.

CCing rth as author...


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]