[Bug rtl-optimization/48345] [4.7 Regression] [SH] Invalid float register allocated

["vmakarov at redhat dot com" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48345

--- Comment #2 from Vladimir Makarov <vmakarov at redhat dot com> 2011-03-29 23:59:08 UTC ---
(In reply to comment #0)
> 
> It seems that ira-color.c:assign_hard_reg chooses a register
> of which corresponding bit of ira_prohibited_class_mode_regs
> [FP_REGS][DFmode] is set.  The patch below looks to work for me,
> though I'm suspecting the real problem is in the target side.
> 
> --- ORIG/trunk/gcc/ira-color.c    2011-03-29 10:08:17.000000000 +0900
> +++ LOCAL/trunk/gcc/ira-color.c    2011-03-29 15:09:06.000000000 +0900
> @@ -1692,6 +1692,9 @@ assign_hard_reg (ira_allocno_t a, bool r
>        && FIRST_STACK_REG <= hard_regno && hard_regno <= LAST_STACK_REG)
>      continue;
>  #endif
> +      if (TEST_HARD_REG_BIT (ira_prohibited_class_mode_regs[aclass][mode],
> +                 hard_regno))
> +    continue;
>        if (! check_hard_reg_p (a, hard_regno,
>                    conflicting_regs, profitable_hard_regs))
>      continue;

The patch is ok for me.  This code was lost accidentally on ira-improv branch.

Could you commit the patch (of course with a proper changelog entry).  I am
approving the patch.

Thanks.