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[Bug middle-end/44297] Big spec cpu2006 prefetch regressions on gcc 4.6 on x86
- From: "changpeng dot fang at amd dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 28 May 2010 16:56:09 -0000
- Subject: [Bug middle-end/44297] Big spec cpu2006 prefetch regressions on gcc 4.6 on x86
- References: <bug-44297-18740@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #7 from changpeng dot fang at amd dot com 2010-05-28 16:56 -------
(In reply to comment #5)
> An alternative approach might be have different values for
> prefetch-min-insn-to-mem-ratio and min-insn-to-prefetch-ratio
> depending on constant/non-constant step size.
>
It may be a good idea for limit non-constant step prefetching to
big loops. This is because we are not very confident that the
reference will cause cache miss, and we should limit the prefetches
generated. min-insn-to-prefetch-ratio may be a good parameter to
work on.
By the way, I am thinking that min-insn-to-prefetch-ratio should
be backend dependent. In certain sense, this parameter implies
how many "useless" prefetches can an architecture tolerate.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44297