[Bug target/42895] New: Low registers are preferred than register ip in thumb2 mode

["carrot at google dot com" <gcc-bugzilla at gcc dot gnu dot org>]

Compile the attached source code with options -march=armv7-a -mthumb -Os, gcc
generates:

        ldr     r3, [r0, #0]
        push    {r4, r5, lr}
        ldrb    r0, [r3, #0]    @ zero_extendqisi2
        cmp     r0, #127
        bgt     .L2
        ldrb    ip, [r3, #1]    @ zero_extendqisi2
        adds    r4, r3, #1
        sbfx    r0, r0, #0, #7
        cmp     ip, #127
        ble     .L2
        add     ip, r4, #1
        ldrb    r4, [r4, #1]    @ zero_extendqisi2
        and     r5, r4, #127
        cmp     r4, #127
        orr     r0, r0, r5, lsl #14
        ble     .L2
        add     r4, ip, #1
        ldrb    ip, [ip, #1]    @ zero_extendqisi2
        cmp     ip, #127
        and     r5, ip, #127
        it      gt
        ldrbgt  ip, [r4, #1]    @ zero_extendqisi2
        orr     r0, r0, r5, lsl #21
        it      gt
        orrgt   r0, r0, ip, lsl #28
.L2:
        cbz     r1, .L3
        cmp     r3, r1
        bls     .L3
        movs    r3, #0
        str     r3, [r2, #0]
.L3:
        pop     {r4, r5, pc}

Register ip is used in many instructions, usually these instructions are 32
bit. If we use a low register(r0 - r7), many of these instructions can be 16
bit. In this code snippet r6 and r7 are available, so we should use them first.


-- 
           Summary: Low registers are preferred than register ip in thumb2
                    mode
           Product: gcc
           Version: 4.5.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: carrot at google dot com
 GCC build triplet: i686-linux
  GCC host triplet: i686-linux
GCC target triplet: arm-eabi


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42895