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[Bug target/41505] GCC choosing poor code sequence for certain stores (x86)
- From: "rth at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 29 Sep 2009 21:18:38 -0000
- Subject: [Bug target/41505] GCC choosing poor code sequence for certain stores (x86)
- References: <bug-41505-391@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #3 from rth at gcc dot gnu dot org 2009-09-29 21:18 -------
There are already peepholes for this, though the condition appears to be
slightly wrong for -Os. See i386.md:21121 :
(define_peephole2
[(match_scratch:SI 1 "r")
(set (match_operand:SI 0 "memory_operand" "")
(const_int 0))]
"optimize_insn_for_speed_p ()
&& ! TARGET_USE_MOV0
&& TARGET_SPLIT_LONG_MOVES
&& get_attr_length (insn) >= ix86_cur_cost ()->large_insn
&& peep2_regno_dead_p (0, FLAGS_REG)"
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41505