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[Bug target/40835] redundant comparison instruction



------- Comment #4 from carrot at google dot com  2009-07-24 07:37 -------
Just as I've figured out HAVE_cc0 is disabled. And cse_condition_code_reg does
nothing for thumb target.

I also found that the conditional branch instructions is always in the same
insn pattern as the previous compare instructions. So I even wonder there is
any way to express the optimized sequence (movs followed by bcc).

Is there any other places that I should take a look?


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40835


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