This is the mail archive of the
gcc-bugs@gcc.gnu.org
mailing list for the GCC project.
[Bug target/40457] use stm and ldm to access consecutive memory words
- From: "ramana at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 17 Jun 2009 09:49:28 -0000
- Subject: [Bug target/40457] use stm and ldm to access consecutive memory words
- References: <bug-40457-17659@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #8 from ramana at gcc dot gnu dot org 2009-06-17 09:49 -------
(In reply to comment #7)
> My command line option is -O2 -Os -mthumb
>
> The compiler didn't run into load_multiple_sequence and
> store_multiple_sequence. The peephole rules specified it applies to TARGET_ARM
> only. Is there any special reason we didn't enable it in thumb mode?
ldms and stms in thumb mode overwrite the base register that is used for
addresses and that's why this is not enabled for thumb mode. One could write a
peephole2 pattern that checked for liveness of the base register - if the base
register were dead after the instruction, then there could be an ldm or stm
peepholed.
>
> For the ascending register number, do we have any code to rename a set of
> registers to make them ascending? In the generated code for the second
> function, the register numbers have different order compared with memory
> offsets.
>
> ldr r2, [r0, #4]
> ldr r3, [r0]
>
Not that I am aware of , it's as good as renaming but to allow combinations to
happen . It might be useful with PR9831 as well but is a separate problem.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40457