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[Bug rtl-optimization/39871] [4.3/4.4/4.5 regression] Code size increase on ARM due to inferior CSE
- From: "mikpe at it dot uu dot se" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 14 Jun 2009 14:06:07 -0000
- Subject: [Bug rtl-optimization/39871] [4.3/4.4/4.5 regression] Code size increase on ARM due to inferior CSE
- References: <bug-39871-17592@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #3 from mikpe at it dot uu dot se 2009-06-14 14:06 -------
(In reply to comment #1)
> With 4.5 I see
> With 4.5.0 I see:
>
> push {lr}
> sub sp, sp, #12
> ldr r2, [r0]
> ldr r1, [r0, #4]
> mov r0, sp
> str r2, [sp, #4]
> bl func
> add sp, sp, #12
> pop {pc}
I've tested every weekly gcc-4.5 snapshot and they all generate one instruction
more than this code.
How did you configure and invoke gcc-4.5 to get this 9-instruction code?
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39871