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[Bug target/40265] New: sh2a compiler ICEs in simplify_subreg, at simplify-rtx.c:4960
- From: "kkojima at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 26 May 2009 22:46:01 -0000
- Subject: [Bug target/40265] New: sh2a compiler ICEs in simplify_subreg, at simplify-rtx.c:4960
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
Newlib build fails during compiling libc/stdlib/ldtoa.c for m2a with
internal compiler error: in simplify_subreg, at simplify-rtx.c:4960
A reduced testcase is
void
foo (unsigned short *x, unsigned short *y)
{
unsigned short *p = x;
*y = 0;
if (*p++)
*y = 0x8000;
}
For m2a, movrt insn is defined as
(define_insn "movrt"
[(set (match_operand:SI 0 "arith_reg_dest" "=r")
(if_then_else (eq:SI (reg:SI T_REG) (const_int 0))
(const_int 1)
(const_int 0)))]
"TARGET_SH2A"
"movrt\\t%0"
[(set_attr "type" "arith")])
and now sh.c:sh_expand_t_scc generates this insn as an scc
instruction. It seems that it's too complex as an scc insn
and confuses the combine phase. I'm testing the patch below
which uses another movrt insn with more simple arithmetic
definition
(define_insn "xorsi3_movrt"
[(set (match_operand:SI 0 "arith_reg_dest" "=r")
(xor:SI (reg:SI T_REG)
(const_int 1)))]
"TARGET_SH2A"
"movrt\\t%0"
[(set_attr "type" "arith")])
diff -uprN ORIG/trunk/gcc/config/sh/sh.c trunk/gcc/config/sh/sh.c
--- ORIG/trunk/gcc/config/sh/sh.c 2009-05-25 08:19:47.000000000 +0900
+++ trunk/gcc/config/sh/sh.c 2009-05-27 07:32:14.000000000 +0900
@@ -11085,7 +11085,7 @@ sh_expand_t_scc (rtx operands[])
emit_insn (gen_movt (result));
else if (TARGET_SH2A && ((code == EQ && val == 0)
|| (code == NE && val == 1)))
- emit_insn (gen_movrt (result));
+ emit_insn (gen_xorsi3_movrt (result));
else if ((code == EQ && val == 0) || (code == NE && val == 1))
{
emit_clobber (result);
diff -uprN ORIG/trunk/gcc/config/sh/sh.md trunk/gcc/config/sh/sh.md
--- ORIG/trunk/gcc/config/sh/sh.md 2009-05-19 10:49:14.000000000 +0900
+++ trunk/gcc/config/sh/sh.md 2009-05-27 07:32:14.000000000 +0900
@@ -9109,16 +9109,6 @@ mov.l\\t1f,r0\\n\\
"movt %0"
[(set_attr "type" "arith")])
-;; complements the T bit and stores the result in a register
-(define_insn "movrt"
- [(set (match_operand:SI 0 "arith_reg_dest" "=r")
- (if_then_else (eq:SI (reg:SI T_REG) (const_int 0))
- (const_int 1)
- (const_int 0)))]
- "TARGET_SH2A"
- "movrt\\t%0"
- [(set_attr "type" "arith")])
-
(define_expand "cstore4_media"
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operator:SI 1 "sh_float_comparison_operator"
--
Summary: sh2a compiler ICEs in simplify_subreg, at simplify-
rtx.c:4960
Product: gcc
Version: 4.5.0
Status: UNCONFIRMED
Keywords: ice-on-valid-code
Severity: normal
Priority: P3
Component: target
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: kkojima at gcc dot gnu dot org
GCC target triplet: sh-unkonwn-elf
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40265