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[Bug target/38931] Seg fault when getting instruction latency on a *movsi_1 with an MMX target register



------- Comment #7 from uros at gcc dot gnu dot org  2009-01-25 12:26 -------
Subject: Bug 38931

Author: uros
Date: Sun Jan 25 12:26:15 2009
New Revision: 143663

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=143663
Log:
        Backport from mainline:
        2009-01-22  Uros Bizjak  <ubizjak@gmail.com>

        PR target/38931
        * config/i386/i386.md (*movsi_1): Use type "mmx" for alternative 2.
        (*movdi_1_rex64): Use type "mmx" for alternative 5.

        2009-01-21  Uros Bizjak  <ubizjak@gmail.com>

        PR rtl-optimization/38879
        * alias.c (base_alias_check): Unaligned access via AND address can
        alias all surrounding object types except those with sizes equal
        or wider than the size of unaligned access.

testsuite/ChangeLog:

        Backport from mainline:
        2009-01-22  Uros Bizjak  <ubizjak@gmail.com>

        PR target/38931
        * gcc.target/i386/pr38931.c: New test.


Added:
    branches/gcc-4_3-branch/gcc/testsuite/gcc.target/i386/pr38931.c
Modified:
    branches/gcc-4_3-branch/gcc/ChangeLog
    branches/gcc-4_3-branch/gcc/alias.c
    branches/gcc-4_3-branch/gcc/config/i386/i386.md
    branches/gcc-4_3-branch/gcc/testsuite/ChangeLog


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38931


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