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[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86



------- Comment #19 from ubizjak at gmail dot com  2008-09-06 16:18 -------
Exact duplicate of PR 17236. Mainline gcc (4.4.0 20080906, IRA) generates:

        pushl   %ebx
        movl    8(%esp), %eax
        movl    16(%esp), %edx
        movl    20(%esp), %ecx
        movl    12(%esp), %ebx
        imull   %eax, %ecx
        imull   %edx, %ebx
        mull    %edx
        addl    %ebx, %ecx
        popl    %ebx
        leal    (%ecx,%edx), %edx


*** This bug has been marked as a duplicate of 17236 ***


-- 

ubizjak at gmail dot com changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
OtherBugsDependingO|17236                       |
              nThis|                            |
             Status|ASSIGNED                    |RESOLVED
         Resolution|                            |DUPLICATE
   Target Milestone|---                         |4.4.0


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=6585


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