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[Bug target/36133] GCC creates suboptimal ASM : Code includes unneeded TST instructions
- From: "gunnar at greyhound-data dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 5 Jun 2008 12:07:35 -0000
- Subject: [Bug target/36133] GCC creates suboptimal ASM : Code includes unneeded TST instructions
- References: <bug-36133-16150@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #5 from gunnar at greyhound-data dot com 2008-06-05 12:07 -------
Please find below a proposed patch.
The patch will making GCC aware that shift does set the CC already
and the TST is not needed in this case.
The same example could be used to used to make GCC aware of the CC set by other
instructions.
Index: gcc/config/m68k/m68k.md
===================================================================
*** gcc/config/m68k/m68k.md.orig 2008-05-30 10:00:55.000000000 +0200
--- gcc/config/m68k/m68k.md 2008-06-04 17:01:11.000000000 +0200
***************
*** 5198,5203 ****
--- 5198,5215 ----
[(set_attr "type" "shift")
(set_attr "opy" "2")])
+ (define_insn "*lshrsi3_cc"
+ [(set (cc0)
+ (lshiftrt:SI (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "general_operand" "dI")))
+ (set (match_operand:SI 0 "register_operand" "=d")
+ (lshiftrt:SI (match_dup 1)
+ (match_dup 2)))]
+ ""
+ "lsr%.l %2,%0"
+ [(set_attr "type" "shift")
+ (set_attr "opy" "2")])
+
(define_insn "lshrhi3"
[(set (match_operand:HI 0 "register_operand" "=d")
(lshiftrt:HI (match_operand:HI 1 "register_operand" "0")
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36133