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[Bug target/35363] Missing bit field coalscing optimization
- From: "pinskia at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 25 Feb 2008 18:38:19 -0000
- Subject: [Bug target/35363] Missing bit field coalscing optimization
- References: <bug-35363-9436@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #2 from pinskia at gcc dot gnu dot org 2008-02-25 18:38 -------
This works correctly for PowerPC*.
PPC64 (with GCC 4.0.1):
lwz r0,0(r11)
rlwinm r0,r0,0,3,31
oris r0,r0,0x4000
and r0,r0,r9
oris r0,r0,0xc00
and r0,r0,r2
ori r0,r0,1024
stw r0,0(r11)
PPC32 (GCC 4.0.2):
lwz r0,0(r9)
rlwimi r0,r2,29,0,2
li r2,3
rlwimi r0,r2,26,3,5
li r2,8
rlwimi r0,r2,7,8,24
stw r0,0(r9)
--
pinskia at gcc dot gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
Component|middle-end |target
GCC target triplet| |x86_64-*-*
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35363