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[Bug target/24743] NaN or correct result after divrp with 3 FPU registers



------- Comment #1 from pinskia at gcc dot gnu dot org  2005-11-08 21:23 -------
Do you have a small source code which exposes the issue here?
(Note I saw "So I can not deliver a small program that
reproduces the problem.... " but we really cannot do anything about it if there
is not a testcase)

Another thing is that you are using a GCC provided by Sun/Codesourcery and we
(FSF) really don't support that version of GCC.  You really should had filed a
bug report to them first.


-- 

pinskia at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|c                           |target


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=24743


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