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[Bug target/20814] ICE in extract_insn for test vmx/varargs-1.c
- From: "dje at watson dot ibm dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 7 Apr 2005 22:09:14 -0000
- Subject: [Bug target/20814] ICE in extract_insn for test vmx/varargs-1.c
- References: <20050407212430.20814.janis@gcc.gnu.org>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Additional Comments From dje at watson dot ibm dot com 2005-04-07 22:09 -------
Subject: Re: New: ICE in extract_insn for test vmx/varargs-1.c
Let me know if the appended patch fixes the ICE. The definition
of the "and" predicates was ignoring CONST_INT that matched predicate
logical_operand.
David
Index: predicates.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/predicates.md,v
retrieving revision 1.10
diff -c -p -r1.10 predicates.md
*** predicates.md 2 Apr 2005 10:46:03 -0000 1.10
--- predicates.md 7 Apr 2005 22:07:33 -0000
***************
*** 531,559 ****
;; Return 1 if the operand is either a non-special register or a constant
;; that can be used as the operand of a PowerPC64 logical AND insn.
(define_predicate "and64_operand"
! (if_then_else (match_code "const_int")
! (match_operand 0 "mask64_operand")
! (if_then_else (match_test "fixed_regs[CR0_REGNO]")
! (match_operand 0 "gpc_reg_operand")
! (match_operand 0 "logical_operand"))))
;; Like and64_operand, but also match constants that can be implemented
;; with two rldicl or rldicr insns.
(define_predicate "and64_2_operand"
! (if_then_else (match_code "const_int")
! (match_test "mask64_1or2_operand (op, mode, true)")
! (if_then_else (match_test "fixed_regs[CR0_REGNO]")
! (match_operand 0 "gpc_reg_operand")
! (match_operand 0 "logical_operand"))))
;; Return 1 if the operand is either a non-special register or a
;; constant that can be used as the operand of a logical AND.
(define_predicate "and_operand"
! (if_then_else (match_code "const_int")
! (match_operand 0 "mask_operand")
! (if_then_else (match_test "fixed_regs[CR0_REGNO]")
! (match_operand 0 "gpc_reg_operand")
! (match_operand 0 "logical_operand"))))
;; Return 1 if the operand is a general non-special register or memory operand.
(define_predicate "reg_or_mem_operand"
--- 531,557 ----
;; Return 1 if the operand is either a non-special register or a constant
;; that can be used as the operand of a PowerPC64 logical AND insn.
(define_predicate "and64_operand"
! (ior (match_operand 0 "mask64_operand")
! (if_then_else (match_test "fixed_regs[CR0_REGNO]")
! (match_operand 0 "gpc_reg_operand")
! (match_operand 0 "logical_operand"))))
;; Like and64_operand, but also match constants that can be implemented
;; with two rldicl or rldicr insns.
(define_predicate "and64_2_operand"
! (ior (and (match_code "const_int")
! (match_test "mask64_1or2_operand (op, mode, true)"))
! (if_then_else (match_test "fixed_regs[CR0_REGNO]")
! (match_operand 0 "gpc_reg_operand")
! (match_operand 0 "logical_operand"))))
;; Return 1 if the operand is either a non-special register or a
;; constant that can be used as the operand of a logical AND.
(define_predicate "and_operand"
! (ior (match_operand 0 "mask_operand")
! (if_then_else (match_test "fixed_regs[CR0_REGNO]")
! (match_operand 0 "gpc_reg_operand")
! (match_operand 0 "logical_operand"))))
;; Return 1 if the operand is a general non-special register or memory operand.
(define_predicate "reg_or_mem_operand"
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20814