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[Bug optimization/11718] [new-ra] ICE on valid code with SSE


------- Additional Comments From 1319 at bot dot ru  2004-04-08 21:02 -------
Fixed on new-regalloc-branch from 20040408:

$ /usr/local/gcc-RA/bin/gcc -fnew-ra -O1 -S 11718.c
R_StainBlendTexel pass: 1 Web 22 class FLOAT_REGS insn class SSE_REGS
Spill out reg 109 from insn:
(insn 298 132 133 0 (set (reg:SF 109)
        (reg:SF 108)) 63 {*movsf_1_nointerunit} (nil)
    (nil))
R_StainBlendTexel pass: 1 Web 11 class FLOAT_REGS insn class GENERAL_REGS
Spill out reg 84 from insn:
(insn 27 23 293 0 (set (reg:SF 84)
        (mem/u/f:SF (symbol_ref/u:SI ("*.LC1") [flags 0x2]) [0 S4 A32])) 63
{*movsf_1_nointerunit} (nil)
    (expr_list:REG_EQUAL (const_double:SF -2147483648 [0x80000000] 1.0e+0
[0x0.8p+1])
        (nil)))
R_StainBlendTexel pass: 1 Web 8 class GENERAL_REGS insn class SSE_REGS
Spill out reg 77 from insn:
(insn 17 16 18 0 (set (reg:SF 77)
        (float:SF (reg:SI 76))) 131 {*floatsisf2_sse} (insn_list 16 (nil))
    (nil))
$

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=11718


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