[Bug bootstrap/12761] [3.4 regression] Segmentation fault in gnat1 compiling a-except.adb

["dave at hiauly1 dot hia dot nrc dot ca" <gcc-bugzilla at gcc dot gnu dot org>]

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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=12761



------- Additional Comments From dave at hiauly1 dot hia dot nrc dot ca  2003-11-01 21:22 -------
Subject: Re:  [3.4 regression] Segmentation fault in gnat

> If the stage1 compiler has indeed been built with -mdisable-indexing,
> then it's either a back-end bug, or more likely a bug in the
> bootstrapping compiler.

You are right, it's a bug in the bootstrapping compiler.  It was 3.3.1.
Tried 3.3 but it has the same problem.  I also see the same assembly
code with 3.3 under hppa-linux but it has an unaligned handler.  3.4
seems to be fixed.  I see this code with 3.4 under hppa-linux:

        .loc 1 4023 0
	addil LR'.LC12-$global$,%r27
	ldo RR'.LC12-$global$(%r1),%r20
	fldw 12(%r3),%fr22L
	fstw %fr22L,-16(%r30)
	ldw -16(%r30),%r19
	depw,z %r19,30,31,%r19
	add,l %r19,%r20,%r19
	ldo -2(%r19),%r20
	ldb 0(%r20),%r19
	extrw,u %r19,31,8,%r19
	depw,z %r19,23,24,%r21
	ldb 1(%r20),%r19
	extrw,u %r19,31,8,%r19
	or %r19,%r21,%r20

The loads are done using ldb.

With the 3.3 branch, we have the following layout for "Names":

names___16
        .STRING "SI"
        .STRING "SO"
        .STRING "SR"
        .STRING "SW"
        .stabs  "exp_ch3__freeze_stream_operations__L_50__T15b___XDLU_1__4:t123=
r1;1;4;",128,0,4022,0
        .align 4
L$C0012
        .STRING "SI"
        .STRING "SO"
        .STRING "SR"
        .STRING "SW"

The initial rtl is as follows:

(note 30 29 31 ("../../gcc/gcc/ada/exp_ch3.adb") 4022)

(insn 31 30 32 00000000 (set (reg:SI 96)
        (const_int 1 [0x1])) -1 (nil)
    (expr_list:REG_EQUAL (const_int 1 [0x1])
        (nil)))

(insn 32 31 33 00000000 (set (mem/f:SI (plus:SI (reg/f:SI 90 virtual-stack-vars)
                (const_int 4 [0x4])) [0 j+0 S4 A32])
        (reg:SI 96)) -1 (nil)
    (nil))

(note 33 32 34 NOTE_INSN_LOOP_BEG)

(code_label 34 33 35 517 "" [0 uses])

(insn 35 34 36 00000000 (set (reg:SI 97)
        (mem/f:SI (plus:SI (reg/f:SI 90 virtual-stack-vars)
                (const_int 4 [0x4])) [0 j+0 S4 A32])) -1 (nil)
    (nil))

(jump_insn 36 35 37 00000000 (set (pc)
        (if_then_else (le (reg:SI 97)
                (const_int 4 [0x4]))
            (label_ref 39)
            (pc))) -1 (nil)
    (nil))

(jump_insn 37 36 38 00000000 (set (pc)
        (label_ref 109)) -1 (nil)
    (nil))

(barrier 38 37 39)

(code_label 39 38 40 520 "" [0 uses])

(note 40 39 41 NOTE_INSN_LOOP_END_TOP_COND)

(note 41 40 42 NOTE_INSN_DELETED)

(note 42 41 43 NOTE_INSN_DELETED)

(note 43 42 44 ("../../gcc/gcc/ada/exp_ch3.adb") 4023)

(insn 44 43 45 00000000 (set (reg/f:SI 99)
        (high:SI (symbol_ref:SI ("*L$C0012")))) -1 (nil)
    (nil))

(insn 45 44 46 00000000 (set (reg/f:SI 98)
        (lo_sum:SI (reg/f:SI 99)
            (symbol_ref:SI ("*L$C0012")))) -1 (nil)
    (expr_list:REG_EQUAL (symbol_ref:SI ("*L$C0012"))
        (nil)))

(insn 46 45 47 00000000 (set (reg:SI 100)
        (mem/f:SI (plus:SI (reg/f:SI 90 virtual-stack-vars)
                (const_int 4 [0x4])) [0 j+0 S4 A32])) -1 (nil)
    (nil))

(insn 47 46 48 00000000 (set (reg:SI 101)
        (reg:SI 100)) -1 (nil)
    (nil))

(insn 48 47 49 00000000 (set (reg:SI 102)
        (ashift:SI (reg:SI 101)
            (const_int 1 [0x1]))) -1 (nil)
    (expr_list:REG_EQUAL (mult:SI (reg:SI 100)
            (const_int 2 [0x2]))
        (nil)))

(insn 49 48 50 00000000 (set (reg:SI 103)
        (plus:SI (reg:SI 102)
            (reg/f:SI 98))) -1 (nil)
    (nil))

(insn 50 49 51 00000000 (set (reg/f:SI 104)
        (plus:SI (reg:SI 103)
            (const_int -2 [0xfffffffe]))) -1 (nil)
    (nil))

(insn 51 50 52 00000000 (set (reg:SI 105)
        (const_int 0 [0x0])) -1 (nil)
    (nil))

(insn 52 51 53 00000000 (set (reg:SI 106)
        (mem/s/u/j:SI (reg/f:SI 104) [0 S4 A32])) -1 (nil)
    (nil))

(insn 53 52 54 00000000 (set (reg:SI 107)
        (zero_extract:SI (reg:SI 106)
            (const_int 16 [0x10])
            (const_int 0 [0x0]))) -1 (nil)
    (nil))

(insn 54 53 55 00000000 (set (reg:SI 108)
        (and:SI (reg:SI 107)
            (const_int 65535 [0xffff]))) -1 (nil)
    (nil))

(insn 55 54 56 00000000 (set (reg:SI 105)
        (and:SI (reg:SI 105)
            (const_int -65536 [0xffff0000]))) -1 (nil)
    (nil))

(insn 56 55 57 00000000 (set (reg:SI 105)
        (ior:SI (reg:SI 105)
            (reg:SI 108))) -1 (nil)
    (nil))

(insn 57 56 58 00000000 (set (reg:SI 26 %r26)
        (mem/u/f:SI (plus:SI (reg/f:SI 89 virtual-incoming-args)
                (const_int -8 [0xfffffff8])) [0 typ+0 S4 A32])) -1 (nil)
    (nil))

(insn 58 57 59 00000000 (set (reg:SI 25 %r25)
        (reg:SI 105)) -1 (nil)
    (nil))

(call_insn 59 58 60 00000000 (parallel [
            (set (reg:SI 28 %r28)
                (call (mem:SI (symbol_ref/v:SI ("@exp_tss__tss")) [0 S4 A32])
                    (const_int 16 [0x10])))
            (clobber (reg:SI 1 %r1))
            (clobber (reg:SI 2 %r2))
            (use (const_int 0 [0x0]))
        ]) -1 (nil)
    (nil)
    (expr_list (use (reg:SI 25 %r25))
        (expr_list (use (reg:SI 26 %r26))
            (nil))))

[...]

(note 101 100 102 NOTE_INSN_LOOP_CONT)

(code_label 102 101 103 519 "" [0 uses])

(insn 103 102 104 00000000 (set (reg:SI 118)
        (mem/f:SI (plus:SI (reg/f:SI 90 virtual-stack-vars)
                (const_int 4 [0x4])) [0 j+0 S4 A32])) -1 (nil)
    (nil))

(insn 104 103 105 00000000 (set (reg:SI 119)
        (plus:SI (reg:SI 118)
            (const_int 1 [0x1]))) -1 (nil)
    (nil))

(insn 105 104 106 00000000 (set (mem/f:SI (plus:SI (reg/f:SI 90 virtual-stack-vars)
                (const_int 4 [0x4])) [0 j+0 S4 A32])
        (reg:SI 119)) -1 (nil)
    (nil))

(jump_insn 106 105 107 00000000 (set (pc)
        (label_ref 34)) -1 (nil)
    (nil))

It can be seen that the load in insn 52 has mode SImode, which won't
work when j is odd.  This definitely isn't a problem in the PA backend.
However, it is sensitive to this problem because it requires strict
alignment.

For 3.4, would it be possible to modify Freeze_Stream_Operations to
workaround the problem?  The failure is still pressent with 3.3.2.

I tried to duplicate this problem in C but it correctly uses HImode
for the memory load of Names(J).  The following C program generates
essentially identical rtl to that generated in the first part of
the loop in Freeze_Stream_Operations, except for the HImode load.

typedef struct {char a[2];} name_t;
extern int exp_tss__tss (int, name_t);
int
freeze (int typ)
{
  static name_t Names[4] = {{'S', 'I'}, {'S', 'O'}, {'S', 'R'}, {'S', 'W'}};
  int j;

  for (j = 0; j < 4; j++)
    if (exp_tss__tss (typ, Names[j]))
      return 1;

  return 0;
}

So, it looks to me as if it could be an ada problem.  I suspect a problem
with the type for Names(J).

Dave