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[Bug c++/11807] New: Wrong usage of registers on ARM
- From: "aw11 at os dot inf dot tu-dresden dot de" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 5 Aug 2003 12:45:42 -0000
- Subject: [Bug c++/11807] New: Wrong usage of registers on ARM
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
PLEASE REPLY TO gcc-bugzilla@gcc.gnu.org ONLY, *NOT* gcc-bugs@gcc.gnu.org.
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=11807
Summary: Wrong usage of registers on ARM
Product: gcc
Version: 3.3
Status: UNCONFIRMED
Severity: critical
Priority: P1
Component: c++
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: aw11 at os dot inf dot tu-dresden dot de
CC: gcc-bugs at gcc dot gnu dot org
GCC build triplet: i686-pc-linux
GCC host triplet: i686-pc-linux
GCC target triplet: arm-linux
The compiler seems to use not or wrong initialized registers for memory references.
1. # arm-linux-g++ -v
Reading specs from /usr/local/lib/gcc-lib/arm-linux/3.3/specs
Configured with: ./configure --prefix=/usr/local --target=arm-linux
--with-newlib --enable-languages=c,c++ --disable-libgcj --program-suffix=-3.3 -v
: (reconfigured) ./configure --prefix=/usr/local --target=arm-linux
--exec-prefix=/usr/local/arm-linux --with-newlib --enable-languages=c,c++
--disable-libgcj --program-suffix=-3.3 -v : (reconfigured) ./configure
--prefix=/usr/local --target=arm-linux --exec-prefix=/usr/local --with-newlib
--enable-languages=c,c++ --disable-libgcj -v : (reconfigured) ./configure
--prefix=/usr/local --target=arm-linux --exec-prefix=/usr/local --with-newlib
--enable-languages=c,c++ --disable-libgcj -v : (reconfigured) ./configure
--prefix=/usr/local --target=arm-linux --exec-prefix=/usr/local --with-newlib
--enable-languages=c,c++ --disable-libgcj -v : (reconfigured) ./configure
--prefix=/usr/local --target=arm-linux --exec-prefix=/usr/local --with-newlib
--enable-languages=c,c++ --disable-libgcj --disable-threads -v
Thread model: single
gcc version 3.3
Command line:
arm-linux-g++ -c -MD -nostdinc -I../src/types/arm -I../src/types \
-I../src/drivers/arm -I../src/drivers \
-I../src/lib/minilibc/arm/include -I../src/lib/minilibc/include \
-I../src/lib/lmm -I../src/lib/amm -I../src/boot \
-I../src/kern/arm -I../src/kern -I../src/lib/libk/arm \
-I../src/lib/libk -I. -Iauto \
-I/usr/local/lib/gcc-lib/arm-linux/3.3//include -W -Wall -fno-rtti \
-fno-exceptions -fno-defer-pop -freg-struct-return -g -Wall -W \
-frename-registers -finline-limit=10000 -O1 ../src/sigma0-arm/test.cc \
-o test.o
Compiler output:
../src/sigma0-arm/test.cc: In function `int main()':
../src/sigma0-arm/test.cc:21: warning: unused variable `l4_threadid_t my_pager'
../src/sigma0-arm/test.cc:21: warning: unused variable `l4_threadid_t
my_preempter'
../src/sigma0-arm/test.cc: In function `void thread_action(unsigned int,
unsigned int, unsigned int)':
../src/sigma0-arm/test.cc:85: warning: unused parameter `unsigned int b'
../src/sigma0-arm/test.cc:85: warning: unused parameter `unsigned int c'
Preprocessed file: (test.ii)
# 1 "../src/sigma0-arm/test.cc"
# 1 "<built-in>"
# 1 "<command line>"
# 1 "../src/sigma0-arm/test.cc"
# 1 "../src/lib/minilibc/include/cstdio" 1
# 1 "../src/lib/minilibc/include/stdio.h" 1
# 1 "../src/lib/minilibc/include/cdefs.h" 1
# 5 "../src/lib/minilibc/include/stdio.h" 2
# 1 "/usr/local/lib/gcc-lib/arm-linux/3.3/include/stddef.h" 1
# 151 "/usr/local/lib/gcc-lib/arm-linux/3.3/include/stddef.h"
typedef int ptrdiff_t;
# 213 "/usr/local/lib/gcc-lib/arm-linux/3.3/include/stddef.h"
typedef unsigned int size_t;
# 6 "../src/lib/minilibc/include/stdio.h" 2
# 1 "../src/lib/minilibc/include/mini_defs.h" 1
# 7 "../src/lib/minilibc/include/stdio.h" 2
extern "C" {
int putchar(int c);
int puts(const char *s);
int putstr(const char *const s);
int putnstr( const char *const c, int len );
int printf(const char *format, ...) __attribute__((format(printf,1,2)));
int sprintf(char *str, const char *format, ...) __attribute__((format(printf,2,3)));
int snprintf(char *str, size_t size, const char *format, ...)
__attribute__((format(printf,3,4)));
int asprintf(char **ptr, const char* format, ...)
__attribute__((format(printf,2,3)));
# 1 "../src/lib/minilibc/include/stdarg.h" 1
# 9 "../src/lib/minilibc/include/stdarg.h"
pedef __builtin_va_list va_list;
# 25 "../src/lib/minilibc/include/stdio.h" 2
int vprintf(const char *format, va_list ap) __attribute__((format(printf,1,0)));
int vsprintf(char *str, const char *format, va_list ap)
__attribute__((format(printf,2,0)));
int vsnprintf(char *str, size_t size, const char *format, va_list ap)
__attribute__((format(printf,3,0)));
typedef int FILE;
int getchar(void);
char *gets(char *s) __attribute__((deprecated));
char *fgets(char *s, int size, FILE *stream);
int vscanf(const char *format, va_list ap) __attribute__((format(scanf,1,0)));
int vsscanf(const char *str, const char *format, va_list ap)
__attribute__((format(scanf,2,0)));
int sscanf(const char *str, const char *format, ...);
}
# 7 "../src/lib/minilibc/include/cstdio" 2
namespace std {
using ::putchar;
using ::puts;
using ::putstr;
using ::putnstr;
using ::printf;
using ::sprintf;
using ::snprintf;
using ::asprintf;
using ::sscanf;
using ::vprintf;
using ::vsprintf;
using ::vsnprintf;
using ::getchar;
using ::gets;
using ::fgets;
using ::vscanf;
using ::vsscanf;
};
# 2 "../src/sigma0-arm/test.cc" 2
# 1 "../src/types/types.h" 1
# 11 "../src/types/types.h"
# 1 "/usr/local/lib/gcc-lib/arm-linux/3.3/include/stddef.h" 1
# 12 "../src/types/types.h" 2
# 1 "../src/types/arm/types-arch.h" 1
# 15 "../src/types/arm/types-arch.h"
typedef unsigned char Unsigned8;
typedef signed char Signed8;
typedef unsigned short Unsigned16;
typedef signed short Signed16;
typedef unsigned int Unsigned32;
typedef signed int Signed32;
typedef unsigned long long int Unsigned64;
typedef signed long long int Signed64;
typedef Signed32 Smword;
typedef Unsigned32 Mword;
typedef Unsigned32 Address;
typedef Unsigned64 Cpu_time;
# 13 "../src/types/types.h" 2
template< typename a, typename b > inline
a nonull_static_cast( b p )
{
int d = reinterpret_cast<int>(static_cast<a>(reinterpret_cast<b>(10))) - 10;
return reinterpret_cast<a>( reinterpret_cast<Mword>(p) + d );
}
typedef struct { Unsigned32 low, high; } l4_low_high_t;
typedef struct { Address low, high; } l4_addr_range_t;
typedef Smword ssize_t;
# 3 "../src/sigma0-arm/test.cc" 2
# 1 "../src/sigma0-arm/syscalls.h" 1
# 33 "../src/sigma0-arm/syscalls.h"
extern "C" {
# 44 "../src/sigma0-arm/syscalls.h"
typedef Unsigned64 cpu_time_t;
typedef struct {
unsigned prio:8;
unsigned small:8;
unsigned zero:4;
unsigned time_exp:4;
unsigned time_man:8;
} l4_sched_param_struct_t;
typedef union {
Mword sched_param;
l4_sched_param_struct_t sp;
} l4_sched_param_t;
typedef struct {
unsigned grant:1;
unsigned write:1;
unsigned size:6;
unsigned zero:4;
unsigned page:20;
} l4_fpage_struct_t;
typedef union {
Mword raw;
l4_fpage_struct_t fp;
} l4_fpage_t;
typedef struct {
Mword snd_size;
Mword snd_str;
Mword rcv_size;
Mword rcv_str;
} l4_strdope_t;
typedef union {
struct {
unsigned version : 10;
unsigned thread : 6;
unsigned task : 8;
unsigned chief : 8;
} id;
Mword raw;
} l4_threadid_t;
typedef struct {
unsigned rcv_exp:4;
unsigned snd_exp:4;
unsigned rcv_pfault:4;
unsigned snd_pfault:4;
unsigned snd_man:8;
unsigned rcv_man:8;
} l4_timeout_struct_t;
typedef union {
Mword raw;
l4_timeout_struct_t timeout;
} l4_timeout_t;
# 121 "../src/sigma0-arm/syscalls.h"
typedef union
{
struct {
Mword msg_deceited :1;
Mword fpage_received :1;
Mword msg_redirected :1;
Mword src_inside :1;
Mword error_code :4;
Mword strings :5;
Mword dwords :19;
} md;
Mword raw;
} l4_msgdope_t;
# 173 "../src/sigma0-arm/syscalls.h"
extern __inline__ l4_threadid_t l4_myself (void);
extern __inline__ int l4_nchief (l4_threadid_t destination,
l4_threadid_t *next_chief);
extern __inline__ void l4_fpage_unmap (l4_fpage_t fpage,
Mword mask);
extern __inline__ l4_fpage_t l4_fpage (Mword address,
Mword size,
Mword write,
Mword grant);
extern __inline__ void l4_thread_switch (l4_threadid_t destintaion);
extern __inline__ void l4_yield (void);
extern __inline__ void l4_thread_ex_regs (l4_threadid_t destination,
Mword ip,
Mword sp,
l4_threadid_t *preempter,
l4_threadid_t *pager,
Mword *old_ip,
Mword *old_sp,
Mword *old_cpsr);
extern __inline__ void l4_task_new (l4_threadid_t dest,
Mword mcp,
Mword usp,
Mword uip,
l4_threadid_t pager);
extern __inline__ cpu_time_t l4_thread_schedule(l4_threadid_t dest,
l4_sched_param_t param,
l4_threadid_t *ext_preempter,
l4_threadid_t *partner,
l4_sched_param_t *old_param);
# 253 "../src/sigma0-arm/syscalls.h"
extern __inline__ void outstring(const char* x)
{
__asm__ __volatile__ (
" mov r0, %1 \n"
" mov lr, pc \n"
" mov pc, %0 \n"
" cmp lr, #2 \n"
:
: "i" ((-0x00000020-8)), "r"(x)
: "r0", "lr");
}
extern __inline__ void outnstring(const char* x, unsigned len)
{
__asm__ __volatile__ (
" mov r0, %1 \n"
" mov r1, %2 \n"
" mov lr, pc \n"
" mov pc, %0 \n"
" cmp lr, #3 \n"
:
: "i" ((-0x00000020-8)), "r"(x), "r"(len)
: "r0", "r1", "lr");
}
extern __inline__ void outdec(const Mword x )
{
(void)x;
}
extern __inline__ void kd_display(const char* x)
{
(void)x;
}
extern __inline__ char kd_inchar()
{
char c;
__asm__ __volatile__ (
" mov lr, pc \n"
" mov pc, %1 \n"
" cmp lr, #13 \n"
" mov %0, r0 \n"
: "=r" (c)
: "i" ((-0x00000020-8))
: "r0", "lr");
return c;
}
# 310 "../src/sigma0-arm/syscalls.h"
extern __inline__ l4_threadid_t l4_myself(void)
{
l4_threadid_t id;
asm volatile
(
" stmdb sp!, {fp} \n"
" mov r0, %2 \n"
" mov lr, pc \n"
" mov pc, %1 \n"
" mov %0, r1 \n"
" ldmia sp!, {fp} \n"
:"=r" (id)
:"i" ((-0x00000008-8)),
"i" (((l4_threadid_t) { raw : 0 }).raw)
:"r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
"r10", "r11", "r12", "r14", "memory");
return id;
}
extern __inline__ void l4_fpage_unmap(l4_fpage_t fpage, Mword mask)
{
__asm__ __volatile__
(
" stmdb sp!, {fp} \n"
" mov r0, %1 @ l4_fpage_unmap \n"
" mov r1, %2 \n"
" mov pc, %0 \n"
" ldmia sp!, {fp} \n"
:
:"i" ((-0x0000000C-8)),
"ri" (fpage.raw),
"ri" (mask)
:"r0", "r1", "r4", "r5", "r6", "r7", "r8", "r9",
"r10", "r11", "r12", "r14", "memory");
}
extern __inline__ l4_fpage_t l4_fpage(Mword address,
Mword size,
Mword write,
Mword grant)
{
return ((l4_fpage_t){fp:{grant, write, size, 0,
(address & 0xfffff000U) >> 12 }});
}
extern __inline__ void l4_thread_switch(l4_threadid_t dest)
{
__asm__ __volatile__
(
" stmdb sp!, {fp} \n"
" mov r0, %1 @ l4_thread_switch \n"
" mov lr, pc \n"
" mov pc, %0 \n"
" ldmia sp!, {fp} \n"
:
:"i" ((-0x00000010-8)),
"r" (dest)
:"r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
"r10", "r11", "r12", "r14", "memory");
}
extern __inline__ void l4_yield(void)
{
l4_thread_switch(((l4_threadid_t) { raw : 0 }));
}
extern __inline__ void l4_thread_ex_regs(l4_threadid_t destination,
Mword ip, Mword sp,
l4_threadid_t *preempter,
l4_threadid_t *pager,
Mword *old_ip,
Mword *old_sp,
Mword *old_cpsr){
register Mword _dst asm("r0") = destination.id.thread;
register Mword _ip asm("r1") = ip;
register Mword _sp asm("r2") = sp;
register Mword _pager asm("r3") = pager->raw;
register Mword _flags asm("r4");
(void)preempter;
__asm__ __volatile__
(
" ldr r10, [sp,#24] \n"
" stmdb sp!, {fp} \n"
" mov lr, pc \n"
" mov pc, %5 \n"
" ldmia sp!, {fp} \n"
:
"=r" (_dst),
"=r" (_ip),
"=r" (_sp),
"=r" (_pager),
"=r" (_flags)
:
"i" ((-0x00000018-8)),
"0" (_dst),
"1" (_ip),
"2" (_sp),
"3" (_pager)
:
"r5", "r6", "r7", "r8", "r9",
"r10", "r11", "r12", "r14", "memory");
if(pager) pager->raw = _pager;
if(old_ip) *old_ip = _ip;
if(old_sp) *old_sp = _sp;
if(old_cpsr) *old_cpsr = _flags;
}
extern __inline__ void l4_task_new(l4_threadid_t dest,
Mword mcp,
Mword usp,
Mword uip,
l4_threadid_t pager)
{
Mword x[] = {dest.raw, mcp, pager.raw, uip, usp};
__asm__ __volatile__
(
" /* l4_task_new() */ \n"
" ldr r0, %1 \n"
" ldr r1, %2 \n"
" ldr r2, %3 \n"
" ldr r3, %4 \n"
" ldr r4, %5 \n"
" stmdb sp!, {fp} \n"
" mov lr, pc \n"
" mov pc, %0 \n"
" ldmia sp!, {fp} \n"
:
:"i" ((-0x0000001C-8)),
"m" (x[0]), "m" (x[1]), "m" (x[2]), "m" (x[3]), "m" (x[4])
:"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
"r10", "r11", "r12", "r14", "memory");
}
extern __inline__ cpu_time_t l4_thread_schedule(l4_threadid_t dest,
l4_sched_param_t param,
l4_threadid_t *ext_preempter,
l4_threadid_t *partner,
l4_sched_param_t *old_param)
{
(void)ext_preempter;
__asm__ __volatile__ (
"/* l4_thread_schedule */ \n"
" stmdb sp!, {fp} \n"
" mov r0, %4 \n"
" mov r1, %3 \n"
" mov lr, pc \n"
" mov pc, %2 \n"
" mov r0, %1 \n"
" ldmia sp!, {fp} \n"
:"=r" (partner),
"=r" (*old_param)
:"i" ((-0x00000014-8)),
"r" (dest),
"r" (param)
:"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r10", "r11", "r12", "r14");
return 0;
}
extern __inline__ int l4_ipc_wait(l4_threadid_t *src,
void *rcv_msg,
Mword *rcv_dword0,
Mword *rcv_dword1,
Mword *rcv_dword2,
l4_timeout_t timeout,
l4_msgdope_t *result)
{
union {
struct {
Mword rcv;
l4_timeout_t timeout;
} in;
struct {
Mword dw0;
Mword dw1;
Mword dw2;
l4_threadid_t src;
l4_msgdope_t result;
} out;
} x = { in: {((Mword) rcv_msg | 1), timeout}};
asm volatile(
"/* l4_ipc_wait(start) */ \n"
" ldr r2, %1 \n"
" ldr r3, %7 \n"
" mov r1, #0xFFFFFFFF \n"
" stmdb sp!, {fp} \n"
" mov lr, pc \n"
" mov pc, %0 \n"
" ldmia sp!, {fp} \n"
" str r0, %6 \n"
" str r1, %2 \n"
" str r4, %3 \n"
" str r5, %4 \n"
" str r6, %5 \n"
"\t/* l4_ipc_wait(end) */ \n"
:
: "i" ((-0x00000004-8)),
"m" (x.in.rcv),
"m" (x.out.src),
"m" (x.out.dw0),
"m" (x.out.dw1),
"m" (x.out.dw2),
"m" (x.out.result),
"m" (x.in.timeout)
: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
"r10", "r11", "r12", "r14", "memory");
*rcv_dword0 = x.out.dw0;
*rcv_dword1 = x.out.dw1;
*rcv_dword2 = x.out.dw2;
*result = x.out.result;
*src = x.out.src;
return result->md.error_code;
}
extern __inline__ int l4_ipc_receive(l4_threadid_t src,
void *rcv_msg,
Mword *rcv_dword0,
Mword *rcv_dword1,
Mword *rcv_dword2,
l4_timeout_t timeout,
l4_msgdope_t *result)
{
union {
struct {
l4_threadid_t src;
Mword rcv;
l4_timeout_t timeout;
} in;
struct {
Mword dw0;
Mword dw1;
Mword dw2;
l4_msgdope_t result;
} out;
} x = { in: {src, (Mword) rcv_msg, timeout}};
asm volatile(
"/* l4_ipc_receive(start) */ \n"
" ldr r1, %2 \n"
" ldr r2, %1 \n"
" ldr r3, %7 \n"
" mov r1, #0xFFFFFFFF \n"
" stmdb sp!, {fp} \n"
" mov lr, pc \n"
" mov pc, %0 \n"
" ldmia sp!, {fp} \n"
" str r0, %6 \n"
" str r1, %2 \n"
" str r4, %3 \n"
" str r5, %4 \n"
" str r6, %5 \n"
"\t/* l4_ipc_receive(end) */ \n"
:
: "i" ((-0x00000004-8)),
"m" (x.in.rcv),
"m" (x.in.src),
"m" (x.out.dw0),
"m" (x.out.dw1),
"m" (x.out.dw2),
"m" (x.out.result),
"m" (x.in.timeout)
: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
"r10", "r11", "r12", "r14", "memory"
);
*rcv_dword0 = x.out.dw0;
*rcv_dword1 = x.out.dw1;
*rcv_dword2 = x.out.dw2;
*result = x.out.result;
return result->md.error_code;
}
extern __inline__ int l4_ipc_send(l4_threadid_t dest,
const void *snd_msg,
Mword w0,
Mword w1,
Mword w2,
l4_timeout_t timeout,
l4_msgdope_t *result)
{
register Mword _dest asm("r0") = dest.raw;
register Mword _snd_msg asm("r1") = (Mword)snd_msg;
register Mword _rcv_desc asm("r2") = ~0U;
register Mword _timeout asm("r3") = timeout.raw;
register Mword _w0 asm("r4") = w0;
register Mword _w1 asm("r5") = w1;
register Mword _w2 asm("r6") = w2;
__asm__ __volatile__
("/* l4_ipc_send(start) */\n\t"
" stmdb sp!, {fp} \n\t"
" mov lr, pc \n\t"
" mov pc, %7 \n\t"
" ldmia sp!, {fp} \n\t"
" str r0, %8 \n\t"
"/*l4_ipc_send(end) */ \n\t"
:
"=r" (_dest),
"=r" (_snd_msg),
"=r" (_rcv_desc),
"=r" (_timeout),
"=r" (_w0),
"=r" (_w1),
"=r" (_w2)
:
"i" ((-0x00000004-8)),
"m" (*result),
"0" (_dest),
"1" (_snd_msg),
"2" (_rcv_desc),
"3" (_timeout),
"4" (_w0),
"5" (_w1),
"6" (_w2)
:
"r7", "r8", "r9", "r10", "r11", "r12", "r14", "memory"
);
return result->md.error_code;
}
extern __inline__ int l4_ipc_call(l4_threadid_t dest,
const void *snd_msg,
Mword snd_dword0,
Mword snd_dword1,
Mword snd_dword2,
void *rcv_msg,
Mword *rcv_dword0,
Mword *rcv_dword1,
Mword *rcv_dword2,
l4_timeout_t timeout,
l4_msgdope_t *result)
{
struct
{
Mword tid;
Mword snd_dsc;
Mword rcv_dsc;
Mword timeout;
Mword dw0;
Mword dw1;
Mword dw2;
l4_msgdope_t result;
} x = {dest.raw, (Mword) snd_msg, (Mword) rcv_msg, timeout.raw,
snd_dword0, snd_dword1, snd_dword2 , {raw: 0}};
__asm__ __volatile__ (
"/* l4_ipc_call(start) */ \n"
" ldr r0, %1 \n"
" ldr r1, %2 \n"
" ldr r2, %3 \n"
" ldr r3, %8 \n"
" ldr r4, %4 \n"
" ldr r5, %5 \n"
" ldr r6, %6 \n"
" stmdb sp!, {fp} \n"
" mov lr, pc \n"
" mov pc, %0 \n"
" ldmia sp!, {fp} \n"
" str r0, %7 \n"
" str r4, %4 \n"
" str r5, %5 \n"
" str r6, %6 \n"
"\t/*l4_ipc_call(end) */ \n"
:
: "i" ((-0x00000004-8)),
"m" (x.tid),
"m" (x.snd_dsc),
"m" (x.rcv_dsc),
"m" (x.dw0),
"m" (x.dw1),
"m" (x.dw2),
"m" (x.result),
"m" (x.timeout)
:"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
"r10", "r11", "r12", "r14", "memory");
*rcv_dword0 = x.dw0;
*rcv_dword1 = x.dw1;
*rcv_dword2 = x.dw2;
*result = x.result;
return result->md.error_code;
}
extern __inline__ int l4_ipc_reply_and_wait(l4_threadid_t dest,
const void *snd_msg,
Mword snd_dword0,
Mword snd_dword1,
Mword snd_dword2,
l4_threadid_t *src,
void *rcv_msg,
Mword *rcv_dword0,
Mword *rcv_dword1,
Mword *rcv_dword2,
l4_timeout_t timeout,
l4_msgdope_t *result)
{
struct
{
Mword tid;
Mword snd_dsc;
Mword rcv_dsc;
l4_timeout_t timeout;
Mword dw0;
Mword dw1;
Mword dw2;
l4_msgdope_t result;
} x = {dest.raw, (Mword) snd_msg, (Mword) rcv_msg | 1,
timeout, snd_dword0, snd_dword1, snd_dword2, {raw: 0}};
__asm__ __volatile__ (
"/* l4_ipc_reply_and_wait(start) */ \n"
" ldr r0, %1 \n"
" ldr r1, %2 \n"
" ldr r2, %3 \n"
" ldr r3, %8 \n"
" ldr r4, %4 \n"
" ldr r5, %5 \n"
" ldr r6, %6 \n"
" stmdb sp!, {fp} \n"
" mov lr, pc \n"
" mov pc, %0 \n"
" ldmia sp!, {fp} \n"
" str r0, %7 \n"
" str r1, %1 \n"
" str r4, %4 \n"
" str r5, %5 \n"
" str r6, %6 \n"
"\t/*l4_ipc_reply_and_wait(end) */ \n"
:
: "i" ((-0x00000004-8)),
"m" (x.tid),
"m" (x.snd_dsc),
"m" (x.rcv_dsc),
"m" (x.dw0),
"m" (x.dw1),
"m" (x.dw2),
"m" (x.result),
"m" (x.timeout)
:"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
"r10", "r11", "r12", "r14", "memory");
*rcv_dword0 = x.dw0;
*rcv_dword1 = x.dw1;
*rcv_dword2 = x.dw2;
src->raw = x.tid;
*result = x.result;
return result->md.error_code;
return 0;
}
}
# 4 "../src/sigma0-arm/test.cc" 2
Mword stack[1024];
extern "C" {
void thread_action(unsigned sta, unsigned, unsigned);
void thread_action_asm();
}
int main()
{
l4_threadid_t my_pager, my_preempter, myself, dst;
l4_threadid_t sigma0;
sigma0.raw = 0;
sigma0.id.task=2;
dst.raw = 0;
dst.id.task=4;
dst.id.thread=1;
myself = l4_myself();
int x=0;
Mword d1,d2,d3;
l4_msgdope_t result;
printf("TEST[""%d.%d""]: Start thread ""%d.%d"": sp= %p\n", (myself).id.task,
(myself).id.thread,(dst).id.task, (dst).id.thread,stack);
printf("TEST: pager= %08x, ""%d.%d""\n",sigma0.raw,(sigma0).id.task,
(sigma0).id.thread);
l4_thread_ex_regs(dst,(Mword)&thread_action_asm,(Mword)(stack+1020),
&((l4_threadid_t) { raw : ~0 }),&sigma0,
0,0,0 );
printf("TEST[""%d.%d""]: Start should be up\n", (myself).id.task,
(myself).id.thread);
if(l4_ipc_send(dst, 0, d1, d2, d3, ((l4_timeout_t) { raw: 0}), &result)==0) {
puts("SUCCESS");
} else {
puts("ERROR");
}
__asm__ __volatile__ ( " mov lr, pc \n" " mov pc, %0 \n" " b 1f \n" "
.ascii \"" "\" \n" " .byte 0 \n" " .align 2 \n" "1: \n" : : "i"
((-0x00000020-8)) : "lr");
for(x=0;x<10;x++)
{
printf("TEST[""%d.%d""]: Hello World!\n", (myself).id.task,
(myself).id.thread );
l4_ipc_receive(((l4_threadid_t) { raw : 0 }), 0, &d1, &d2, &d3,
( (l4_timeout_t) {timeout: { 9, 0, 0, 0, 0, 122 } } ),
&result);
}
thread_action(10,20,30);
return 1;
}
asm
(".text \n"
".globl thread_action_asm \n"
"thread_action_asm: \n"
" mov r0, sp \n"
" adr sp, 1f \n"
" ldr sp, [sp] \n"
" b thread_action \n"
"1: .word stack+4096 \n");
extern "C" __attribute__((noinline)) void thread_action(unsigned sta,unsigned b,
unsigned c)
{
Mword d1,d2,d3;
l4_msgdope_t result;
l4_threadid_t myself, other;
myself = l4_myself();
other=myself;
other.id.thread=0;
printf("TEST[""%d.%d""]: thread_action (ostack=%08x)!!!\n", (myself).id.task,
(myself).id.thread,sta);
printf("TEST[""%d.%d""]: waiting for ipc from ""%d.%d""\n", (myself).id.task,
(myself).id.thread,
(other).id.task, (other).id.thread);
l4_ipc_receive(other,0,&d1,&d2,&d3, ((l4_timeout_t) { raw: 0}), &result);
__asm__ __volatile__ ( " mov lr, pc \n" " mov pc, %0 \n" " b 1f \n" "
.ascii \"" "\" \n" " .byte 0 \n" " .align 2 \n" "1: \n" : : "i"
((-0x00000020-8)) : "lr");
l4_ipc_receive(((l4_threadid_t) { raw : 0 }), 0, &d1, &d2, &d3,
((l4_timeout_t) { raw: 0}), &result);
return;
}