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[Bug target/10412] Renesas SH - Incorrect code generation
- From: "dhananjayd at kpitcummins dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 26 Jun 2003 06:43:07 -0000
- Subject: [Bug target/10412] Renesas SH - Incorrect code generation
- References: <20030415115600.10412.shrinivasa@kpitcummins.com>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=10412
------- Additional Comments From dhananjayd at kpitcummins dot com 2003-06-26 06:43 -------
Subject: RE: Renesas SH - Incorrect code generation
Hi,
> The patch below fixes the problem on 3.3 branch and mainline by
> removing MACL and MACH from fixed regs when -mhitachi option is
> passed.
>I don't understand why this patch would fix the problem, and it's
>definitely not correct in general. At least MACH_REG must remain
>fixed if the target happens to be SH1, per comments right before
>FIXED_REGISTERS in sh.h.
Thanks for your review.
The MACH and MACL registers are marked as call saved for -mhitachi option. Both registers are marked as FIXED but are still allocated in reload stage. If you look at generated assembly and RTL dump for the test case, macl is being used to save function pointer. The mul insn will corrupt macl because for it macl is fixed and not saved before mul isnn.
My analysus was that anyway if the register allocator is using these registers though they are marked as FIXED, why not remove them from FIXED. Removing only MACL from fixed also generates correct code for this test case.
I agree with your comment about SH1. But if you compile the test case of PR 10413 for SH1 w/o this patch, you will find that mach is still being used to store pointer though it is marked as fixed which is wrong as it is only 10 bits wide and will corrupt pointer.
If you have any suggestion, I will work on it.
-Dhananjay