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[Bug target/10412] Renesas SH - Incorrect code generation
- From: "dhananjayd at kpitcummins dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 25 Jun 2003 09:52:44 -0000
- Subject: [Bug target/10412] Renesas SH - Incorrect code generation
- References: <20030415115600.10412.shrinivasa@kpitcummins.com>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
PLEASE REPLY TO gcc-bugzilla@gcc.gnu.org ONLY, *NOT* gcc-bugs@gcc.gnu.org.
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=10412
------- Additional Comments From dhananjayd at kpitcummins dot com 2003-06-25 09:52 -------
Subject: RE: Renesas SH - Incorrect code generation
Hi,
The patch below fixes the problem on 3.3 branch and mainline by removing MACL and MACH from fixed regs when -mhitachi option is passed.
-Dhananjay
Changelog -
2003-06-25 Dhananjay Deshpande <dhananjayd@kpitcummins.com>
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): For TARGET_HITACHI, remove MACL and MACH from fixed regs.
=============================================================================
--- sh.h.bug1 Wed May 28 12:07:07 2003
+++ sh.h Tue Jun 17 12:10:45 2003
@@ -108,6 +108,8 @@ do { \
{ \
call_used_regs[MACH_REG] = 0; \
call_used_regs[MACL_REG] = 0; \
+ fixed_regs[MACH_REG] = 0; \
+ fixed_regs[MACL_REG] = 0; \
} \
for (regno = FIRST_FP_REG + (TARGET_LITTLE_ENDIAN != 0); \
regno <= LAST_FP_REG; regno += 2) \
=============================================================================