Incorrect reload of float double in floating register

["John David Anglin" <dave at hiauly1 dot hia dot nrc dot ca>]

In looking at the failure of rbug.c at -O0 on hppa1.1-hp-hpux10.20, I found the
following reload problem.  Here is the rtl after the lreg pass:


(insn 48 47 49 (set (reg:DF 95)
        (float:DF (reg:DI 98))) 148 {floatdidf2} (nil)
    (expr_list:REG_DEAD (reg:DI 98)
        (nil)))

(insn 49 48 50 (set (reg:DF 95)
        (plus:DF (reg:DF 95)
            (reg:DF 95))) 203 {adddf3} (nil)
    (nil))

Here is what happens to insn 49 after the greg pass:

Reloads for insn # 49
Reload 0: reload_in (SI) = (plus:SI (reg/f:SI 3 %r3)
                                                    (const_int 16 [0x10]))
	GENERAL_REGS, RELOAD_FOR_OUTPUT_ADDRESS (opnum = 0), can't combine
	reload_in_reg: (plus:SI (reg/f:SI 3 %r3)
                                                    (const_int 16 [0x10]))
	reload_reg_rtx: (reg:SI 19 %r19)
Reload 1: reload_in (SI) = (plus:SI (reg/f:SI 3 %r3)
                                                    (const_int 16 [0x10]))
	GENERAL_REGS, RELOAD_FOR_INPUT_ADDRESS (opnum = 1), can't combine
	reload_in_reg: (plus:SI (reg/f:SI 3 %r3)
                                                    (const_int 16 [0x10]))
	reload_reg_rtx: (reg:SI 19 %r19)
Reload 2: reload_in (SI) = (plus:SI (reg/f:SI 3 %r3)
                                                    (const_int 16 [0x10]))
	GENERAL_REGS, RELOAD_FOR_INPUT_ADDRESS (opnum = 2), can't combine
	reload_in_reg: (plus:SI (reg/f:SI 3 %r3)
                                                    (const_int 16 [0x10]))
	reload_reg_rtx: (reg:SI 19 %r19)
Reload 3: reload_out (DF) = (mem:DF (plus:SI (reg/f:SI 3 %r3)
                                                        (const_int 16 [0x10])) [0 S8 A64])
	FP_REGS, RELOAD_FOR_OUTPUT (opnum = 0)
	reload_out_reg: (reg:DF 95)
	reload_reg_rtx: (reg:DF 68 %fr22)
Reload 4: reload_in (DF) = (mem:DF (plus:SI (reg/f:SI 3 %r3)
                                                        (const_int 16 [0x10])) [0 S8 A64])
	FP_REGS, RELOAD_FOR_INPUT (opnum = 1), can't combine
	reload_in_reg: (reg:DF 95)
	reload_reg_rtx: (reg:DF 68 %fr22)
Reload 5: reload_in (DF) = (mem:DF (plus:SI (reg/f:SI 3 %r3)
                                                        (const_int 16 [0x10])) [0 S8 A64])
	FP_REGS, RELOAD_FOR_INPUT (opnum = 2), can't combine
	reload_in_reg: (reg:DF 95)
	reload_reg_rtx: (reg:DF 70 %fr23)

Here is the generated rtl:

(insn 48 91 94 (set (reg:DF 68 %fr22)
        (float:DF (reg:DI 68 %fr22))) 148 {floatdidf2} (nil)
    (nil))

(insn 94 48 85 (set (mem:DF (reg:SI 19 %r19) [0 S8 A64])
        (reg:DF 68 %fr22)) 110 {*pa.md:2910} (nil)
    (nil))

(insn 85 94 96 (set (reg:SI 19 %r19)
        (plus:SI (reg/f:SI 3 %r3)
            (const_int 16 [0x10]))) 165 {addsi3} (nil)
    (nil))

(insn 96 85 103 (set (reg:SI 19 %r19)
        (plus:SI (reg/f:SI 3 %r3)
            (const_int 16 [0x10]))) 165 {addsi3} (nil)
    (nil))

(insn 103 96 97 (set (reg:DF 68 %fr22)
        (mem:DF (reg:SI 19 %r19) [0 S8 A64])) 110 {*pa.md:2910} (nil)
    (nil))

(insn 97 103 106 (set (reg:SI 19 %r19)
        (plus:SI (reg/f:SI 3 %r3)
            (const_int 16 [0x10]))) 165 {addsi3} (nil)
    (nil))

(insn 106 97 49 (set (reg:DF 70 %fr23)
        (mem:DF (reg:SI 19 %r19) [0 S8 A64])) 110 {*pa.md:2910} (nil)
    (nil))

(insn 49 106 95 (set (reg:DF 68 %fr22)
        (plus:DF (reg:DF 68 %fr22)
            (reg:DF 70 %fr23))) 203 {adddf3} (nil)
    (nil))

This seems totally wacky.  I don't understand why insn 49 needs any input
reloads.  Secondly, the order of insns 94 and 85 is reversed.  This is
what actually causes the test to fail.  I am guessing there must be
something wrong with the definition of SECONDARY_RELOAD_CLASS on the PA
but it looks like there also must be a problem with reload itself to
cause the insn reversal.

Dave
-- 
J. David Anglin                                  dave.anglin@nrc.ca
National Research Council of Canada              (613) 990-0752 (FAX: 952-6605)