Re: Very nasty C bug in gcc 2.95.2

[Ken Settle <ken at gordian dot com>]

Geoff Keating wrote:
> 
> Ken Settle <gordian.com> writes:
> 
> >   1c:   3b e1 00 08     addi    r31,r1,8
> ...
> >   40:   63 e3 00 02     ori     r3,r31,2
> ...
> > The instruction at 40: is an ori!  it should be an addi.
> 
> No, this is OK.  The stack is aligned (on ppc-eabi) to an 8-byte boundary.
> 
> --
> - Geoffrey Keating <geoffk@geoffk.org>

Thanks!  That's the problem.  Apparently my stack is becoming misaligned
somewhere (aligned to a 4 byte boundry instead of 8).  I guess that'll
take some rooting around in the assembly code to find that one.

Apparently, if the offset is >= 1 && <= the stack alignment boundry, it
uses ori, and it uses addi otherwise, on all 3 cpus mentioned (ppc, arm,
mips).  I'm confused about why anyone would prefer an ori in this
circumstance, rather than an addi.

--------------------------------------------------------------
Is ori faster or fewer instruction bytes then addi on any cpu?
--------------------------------------------------------------

Amazingly, it just works, even though it looks insane, and is certainly
confusing.

Thanks again!


Ken Settle

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