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Re: register renaming causes many ARM testsuite failures
- To: Philip Blundell <philb at gnu dot org>
- Subject: Re: register renaming causes many ARM testsuite failures
- From: Bernd Schmidt <bernds at redhat dot com>
- Date: Wed, 3 Jan 2001 11:12:31 +0000 (GMT)
- Cc: <gcc-bugs at gcc dot gnu dot org>
On Tue, 2 Jan 2001, Philip Blundell wrote:
> >> The problem is that an insn like this matches the special `load multiple'
> >> pattern which generates an LDM instruction:
> >
> >Apparently the constraints on the ldmsi patterns aren't strict enough.
>
> Hmm, really? I don't, offhand, see anything in regrename that would cause the
> constraints to have an effect here. What were you thinking of in particular?
The function build_def_use uses constraints to determine which registers can
be used for renaming. The relevant bit of code is this:
/* Step 6: Begin new chains for writes inside operands. */
/* ??? Many targets have output constraints on the SET_DEST
of a call insn, which is stupid, since these are certainly
ABI defined hard registers. Don't change calls at all. */
if (GET_CODE (insn) != CALL_INSN)
for (i = 0; i < n_ops + recog_data.n_dups; i++)
{
int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops];
rtx *loc = (i < n_ops
? recog_data.operand_loc[opn]
: recog_data.dup_loc[i - n_ops]);
enum reg_class class = recog_op_alt[opn][alt].class;
if (recog_data.operand_type[opn] == OP_OUT)
scan_rtx (insn, loc, class, mark_write, OP_OUT,
recog_op_alt[opn][alt].earlyclobber);
}
Bernd