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register renaming causes many ARM testsuite failures
- To: gcc-bugs at gcc dot gnu dot org
- Subject: register renaming causes many ARM testsuite failures
- From: Philip Blundell <philb at gnu dot org>
- Date: Sat, 30 Dec 2000 16:00:14 +0000
Many test cases are failing to compile at -O3 using the trunk sources on ARM
targets, with errors like this:
/tmp/cc4c42x1.s: Assembler messages:
/tmp/cc4c42x1.s:21: Error: Bad range in register list
/tmp/cc4c42x1.s:23: Error: Bad range in register list
/tmp/cc4c42x1.s:24: Error: Bad range in register list
/tmp/cc4c42x1.s:25: Error: Bad range in register list
/tmp/cc4c42x1.s:28: Error: Bad range in register list
/tmp/cc4c42x1.s:31: Error: Bad range in register list
/tmp/cc4c42x1.s:57: Error: Bad range in register list
/tmp/cc4c42x1.s:59: Error: Bad range in register list
/tmp/cc4c42x1.s:60: Error: Bad range in register list
/tmp/cc4c42x1.s:61: Error: Bad range in register list
The problem is that an insn like this matches the special `load multiple'
pattern which generates an LDM instruction:
insn 32 31 29 (parallel[
(set:SI (reg/f:SI 40)
(plus:SI (reg/f:SI 40)
(const_int 16 [0x10])))
(set (reg:SI 0 r0)
(mem/s:SI (reg/f:SI 40) 0))
(set (reg:SI 1 r1)
(mem/s:SI (plus:SI (reg/f:SI 40)
(const_int 4 [0x4])) 0))
(set (reg:SI 2 r2)
(mem/s:SI (plus:SI (reg/f:SI 40)
(const_int 8 [0x8])) 0))
(set (reg:SI 3 r3)
(mem/s:SI (plus:SI (reg/f:SI 40)
(const_int 12 [0xc])) 0))
] ) 201 {*ldmsi_postinc} (insn_list 31 (insn_list 13 (insn_list 18 (insn_list 24 (nil)))))
(nil))
Unfortunately, register renaming then comes along and shuffles the operands,
making the LDM ill-formed:
(insn 32 31 29 (parallel[
(set:SI (reg/f:SI 12 ip)
(plus:SI (reg/f:SI 12 ip)
(const_int 16 [0x10])))
(set (reg:SI 5 r5)
(mem/s:SI (reg/f:SI 12 ip) 0))
(set (reg:SI 1 r1)
(mem/s:SI (plus:SI (reg/f:SI 12 ip)
(const_int 4 [0x4])) 0))
(set (reg:SI 2 r2)
(mem/s:SI (plus:SI (reg/f:SI 12 ip)
(const_int 8 [0x8])) 0))
(set (reg:SI 3 r3)
(mem/s:SI (plus:SI (reg/f:SI 12 ip)
(const_int 12 [0xc])) 0))
] ) 201 {*ldmsi_postinc} (insn_list:REG_DEP_OUTPUT 10 (insn_list:REG_DEP_OUTPUT 80 (insn_list 31 (insn_list 84 (insn_list 89 (insn_list 18 (insn_list 24 (insn_list 13 (nil)))))))))
(nil))
p.