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-ffloat-store on Intel x86
- To: gcc-bugs at gcc dot gnu dot org
- Subject: -ffloat-store on Intel x86
- From: christopher s ruvolo 128-27e torch <cruvolo at wrc dot xerox dot com>
- Date: Tue, 26 Sep 2000 18:07:00 -0400
Hello all.
I recently tracked down some bugs in my code to gcc's lack of full IEEE
compliance on Intel's x86 FPU when dealing with 64-bit doubles. This has
been documented on this list before (see
http://gcc.gnu.org/ml/gcc-bugs/1999-12n/msg00216.html ).
According to the man page, -ffloat-store should force IEEE compliance, but
on gcc 2.95.2, it only does so if there is only one FPU double operation per
statement.
i.e., statements like "x = y + z;" (all variables being doubles) work fine,
but statements like "x += y * z;" break IEEE compliance, even with
-ffloat-store enabled.
While -ffloat-store does help with single-operation statements if
optimisations are on, it does not help with multiple-operation statements.
I am writing to ask if this has been addressed in the CVS version of gcc,
and if not, why? When do you expect this to be addressed? Are there any
workarounds to this besides splitting my code up into many tiny statements?
Thanks much,
Chris Ruvolo
PS: Please cc: all replies to me as I am not on the list.
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