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Re: ARM thumb-interwork libgcc asm functions have no bx
- To: Giuliano Procida <Giuliano dot Procida at red-m dot com>
- Subject: Re: ARM thumb-interwork libgcc asm functions have no bx
- From: Richard Earnshaw <rearnsha at arm dot com>
- Date: Tue, 08 Aug 2000 12:08:49 +0100
- Cc: "'Nick Clifton'" <nickc at cygnus dot com>, gcc at gcc dot gnu dot org, Simon Gooch <Simon dot Gooch at red-m dot com>, gcc-bugs at gcc dot gnu dot org
- Cc: rearnsha at arm dot com
- Organization: ARM Ltd.
- Reply-To: rearnsha at arm dot com
Giuliano,
Can you please try the following patch. You will need to rebuild the
compiler and (at the very least) the interworking versions of libgcc.a
Richard.
* arm.h (CPP_SPEC): Use sub-spec cpp_interwork.
(CPP_INTERWORK_SPEC, CPP_INTEWORK_DEFAULT_SPC): New sub-specs.
(EXTRA_SPECS): Add them.
* arm/lib1funcs.asm: Support builds for interworking.
Index: arm.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/arm/arm.h,v
retrieving revision 1.77
diff -u -p -r1.77 arm.h
--- arm.h 2000/06/27 02:26:15 1.77
+++ arm.h 2000/08/08 11:02:16
@@ -127,7 +127,7 @@ Unrecognized value in TARGET_CPU_DEFAULT
#define CPP_SPEC "\
%(cpp_cpu_arch) %(cpp_apcs_pc) %(cpp_float) \
-%(cpp_endian) %(subtarget_cpp_spec) %(cpp_isa)"
+%(cpp_endian) %(subtarget_cpp_spec) %(cpp_isa) %(cpp_interwork)"
#define CPP_ISA_SPEC "%{mthumb:-Dthumb -D__thumb__} %{!mthumb:-Darm -D__arm__}"
@@ -234,6 +234,20 @@ Unrecognized value in TARGET_CPU_DEFAULT
/* Default is little endian. */
#define CPP_ENDIAN_DEFAULT_SPEC "-D__ARMEL__ %{mthumb:-D__THUMBEL__}"
+/* Add a define for interworking. Needed when building libgcc.a.
+ This must define __THUMB_INTERWORK__ to the pre-processor if
+ interworking is enabled by default. */
+#ifndef CPP_INTERWORK_DEFAULT_SPEC
+#define CPP_INTERWORK_DEFAULT_SPEC ""
+#endif
+
+#define CPP_INTERWORK_SPEC " \
+%{mthumb-interwork: \
+ %{mno-thumb-interwork: %eIncompatible interworking options} \
+ -D__THUMB_INTERWORK__} \
+%{!mthumb-interwork:%{!mno-thumb-interwork:%(cpp_interwork_default)}} \
+"
+
#define CC1_SPEC ""
/* This macro defines names of additional specifications to put in the specs
@@ -255,6 +269,8 @@ Unrecognized value in TARGET_CPU_DEFAULT
{ "cpp_endian", CPP_ENDIAN_SPEC }, \
{ "cpp_endian_default", CPP_ENDIAN_DEFAULT_SPEC }, \
{ "cpp_isa", CPP_ISA_SPEC }, \
+ { "cpp_interwork" CPP_INTERWORK_SPEC }, \
+ { "cpp_interwork_default" CPP_INTERWORK_DEFAULT_SPEC }, \
{ "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }, \
SUBTARGET_EXTRA_SPECS
Index: lib1funcs.asm
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/arm/lib1funcs.asm,v
retrieving revision 1.10
diff -u -p -r1.10 lib1funcs.asm
--- lib1funcs.asm 2000/05/15 23:14:15 1.10
+++ lib1funcs.asm 2000/08/08 11:02:16
@@ -32,8 +32,13 @@ Boston, MA 02111-1307, USA. */
#define RETc(x) mov##x##s pc, lr
#define RETCOND ^
#else
+#ifdef __THUMB_INTERWORK__
+#define RET bx lr
+#define RETc bx##x lr
+#else
#define RET mov pc, lr
#define RETc(x) mov##x pc, lr
+#endif
#define RETCOND
#endif
@@ -186,7 +191,12 @@ Ldiv0:
push { lr }
bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
+#ifdef __THUMB_INTERWORK__
+ pop { r1 }
+ bx r1
+#else
pop { pc }
+#endif
#else /* arm version */
@@ -245,7 +255,12 @@ Ldiv0:
str lr, [sp, #-4]!
bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
+#ifdef __THUMB_INTERWORK__
+ ldr lr, [sp], #4
+ RET
+#else
ldmia sp!, {pc}RETCOND
+#endif
#endif /* arm version */
@@ -396,7 +411,12 @@ Ldiv0:
push { lr }
bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
+#ifdef __THUMB_INTERWORK__
+ pop { r1}
+ bx r1
+#else
pop { pc }
+#endif
#else /* arm version */
@@ -467,7 +487,12 @@ Ldiv0:
str lr, [sp, #-4]!
bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
+#ifdef __THUMB_INTERWORK__
+ ldr lr, [sp], #4
+ RET
+#else
ldmia sp!, {pc}RETCOND
+#endif
#endif /* arm version */
@@ -589,7 +614,12 @@ Ldiv0:
push { lr }
bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
+#ifdef __THUMB_INTERWORK__
+ pop { r1 }
+ bx r1
+#else
pop { pc }
+#endif
#else /* arm version */
@@ -655,7 +685,12 @@ Ldiv0:
str lr, [sp, #-4]!
bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
+#ifdef __THUMB_INTERWORK__
+ ldr lr, [sp], #4
+ RET
+#else
ldmia sp!, {pc}RETCOND
+#endif
#endif /* arm version */
@@ -819,7 +854,12 @@ Ldiv0:
push { lr }
bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
+#ifdef __THUMB_INTERWORK__
+ pop { r1 }
+ bx r1
+#else
pop { pc }
+#endif
#else /* arm version */
@@ -901,7 +941,12 @@ Ldiv0:
str lr, [sp, #-4]!
bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
+#ifdef __THUMB_INTERWORK__
+ ldr lr, [sp], #4
+ RET
+#else
ldmia sp!, {pc}RETCOND
+#endif
#endif /* arm version */
@@ -931,10 +976,20 @@ Ldiv0:
stmfd sp!, {r1, lr}
swi __NR_getpid
cmn r0, #1000
+#ifdef __THUMB_INTERWORK__
+ ldmhsfd sp!, {r1, lr}
+ RETc(hs)
+#else
ldmhsfd sp!, {r1, pc}RETCOND @ not much we can do
+#endif
mov r1, #SIGFPE
swi __NR_kill
+#ifdef __THUMB_INTERWORK__
+ ldmfd sp!, {r1, lr}
+ RET
+#else
ldmfd sp!, {r1, pc}RETCOND
+#endif
SIZE (__div0)