Re: GCC can't count operands.

[Tony Mantler <eek at escape dot ca>]

At 11:08 AM -0600 3/24/2000, Jeffrey A Law wrote:
>  In message <v04003a03b50096cba707@[24.66.67.189]>you write:
>  > The attached ASM macro is giving me grief. GCC complains about there being
>  > more than 10 operands, and refuses to compile. In reality, there are
>only 6
>  > operands, since the input and output operands are overlayed.
>The fact that operands are overlayed does not matter in the RTL IR we
>have slots for only 10 operands and we have to store every operand, even
>when two are going to be made to match each other.

That doesn't really help. There's more than enough registers on m68k to
support more than 10 operands, even without using f and m, so sane and
proper code breaks. This really isn't a good thing.

Anyways, in the mean time, the following seems to work:

int main(void) {
   long t;
   void *s = &t;
   long count = sizeof(long);

   int x1,x2,x3,x4;

   if (!count)
      return(0);

   __asm__ __volatile__(
         "moveq  #0,%2;\n\t"
         "lsrl   #1,%1 ; jcc 1f ; moveb %2,%0@-\n\t"
      "1: lsrl   #1,%1 ; jcc 1f ; movew %2,%0@-\n\t"
      "1: lsrl   #1,%1 ; jcc 1f ; movel %2,%0@-\n\t"
      "1: lsrl   #1,%1 ; jcc 1f ; movel %2,%0@- ; movel %2,%0@-\n\t"
      "1: subql  #1,%1 ; jcs 3f\n\t"
         "moveq #0,%3 ; moveq #0,%4 ; moveq #0,%5\n\t"
      "2: moveml %2/%3/%4/%5,%0@-\n\t"
         "dbra %1,2b\n\t"
      "3:"
         : "=a" (s), "=d" (count), "=d" (x1), "=d" (x2), "=d" (x3), "=d" (x4)
         : "0" ((char *)s+count), "1" (count)
  );

   return(0);
}

Cheers - Tony :)


--
Tony Mantler         Renaissance Nerd Extraordinaire         eek@escape.ca
Winnipeg, Manitoba, Canada                       http://www.escape.ca/~eek