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Bad right shifts for sparcv9-sun-solaris2.7



While compiling the second stage compiler when bootstraping for
sparcv9-sun-solaris, the following instruction sequence was generated for
expmed.c.  The assembler proceeds to happily choke and die on the two sra
instructions.  I am using the stock Solaris assembler.  This was compiled with
configure options --host=sparcv9-sun-solaris2.7 --enable-threads=solaris.  This
is true of both the most recent snapshot and a tree anoncvs'd this morning.

        mov     %o3, %o0
        mov     6, %o5
        add     %o0, 63, %o1
        cmp     %o0, -1
        movg    %icc, %o0, %o1
        ba,pt   %xcc, .LL348
        sra     %o1, %o5, [%fp+2007]  // error on line 4142
.LL347:
        add     %o0, 31, %o1
        cmp     %o0, -1
        movg    %icc, %o0, %o1
        mov     5, %o0
        sra     %o1, %o0, [%fp+2007] // error on line 4148
.LL348:
.stabn 68,0,1106,.LM453-extract_bit_field
.LM453:
        brz,pn  %i4, .LL352
        nop
        lduh    [%i4], %o0
        cmp     %o0, 54
        be,pn   %icc, .LL434
        mov     45, %o0


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