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more than 10 operands in `asm', but there aren't.
- To: egcs-bugs at cygnus dot com
- Subject: more than 10 operands in `asm', but there aren't.
- From: Robert Harley <Robert dot Harley at inria dot fr>
- Date: Wed, 3 Mar 1999 11:43:22 +0100 (MET)
I thought the "+" constraint would solve my problem with inline asm
complaining about too many operands. Here's the first example I tried:
asm ("adds %0, %0, %4
adcs %1, %1, %5
adcs %2, %2, %6
adc %3, %3, %7"
: "+r" (x0), "+r" (x1), "+r" (x2), "+r" (x3)
: "r" (y0), "r" (y1), "r" (y2), "r" (y3)
: "cc"
);
to add two 128-bit numbers on ARM. But it gives the:
more than 10 operands in `asm'
error even though there are only 8 operands. =:-(
Presumably the 8 are getting expanded internally into 12 before the
check is done. Sure enough in stmt.c, the expand_asm_operands()
function does:
ninputs += ninout;
if (ninputs + noutputs > MAX_RECOG_OPERANDS)
{
error ("more than %d operands in `asm'", MAX_RECOG_OPERANDS);
return;
}
Adding 96-bits numbers should be OK:
asm volatile (
"adds %0, %0, %3
adcs %1, %1, %4
adc %2, %2, %5"
: "+r" (x0), "+r" (x1), "+r" (x2)
: "r" (y0), "r" (y1), "r" (y2)
: "cc"
);
This goes through fine. But then if I break it by accessing
non-existant operands %6, %7 or %8, say like this:
asm volatile (
"adds %0, %0, %3
adcs %1, %1, %4
adc %2, %2, %8"
: "+r" (x0), "+r" (x1), "+r" (x2)
: "r" (y0), "r" (y1), "r" (y2)
: "cc"
);
then it goes through as well and produces bogus code instead of the:
invalid `asm': operand number out of range
error message.
It seems that MAX_RECOG_OPERANDS should be split into two values, one
for the actual number of operands (<= 10) and one for the expanded
number (<= 20 I suppose), so that the good example compiles and the
broken one fails instead of vice-versa.
Bye,
Rob.