x86 float conditional move is buggy

[hjl at lucon dot org (H.J. Lu)]

> problem is x86 uses register stack for float. The operands of the float
> conditional moves have to be the float registers on the register stack.
> For some reason, gcc turns
> 
> (insn 170 157 45 (set (reg/v:DF 10 %st(2))
>         (if_then_else:DF (ne:SI (reg/v:SI 4 %esi)
>                 (reg/v:SI 3 %ebx))
>             (reg/v:DF 9 %st(1))
>             (reg:DF 12 %st(4)))) 396 {movdfcc+2} (insn_list 33 (nil))
>     (nil))
> 
> where (reg/v:DF 10 %st(2)) is not on the stack at the time into
> 
> (insn:QI 178 167 47 (set (reg:DF 8 %st(0))
>         (if_then_else:DF (ne:SI (reg/v:SI 4 %esi)
>                 (reg/v:SI 3 %ebx))
>             (reg:DF 8 %st(0))
>             (reg:DF 9 %st(1)))) 396 {movdfcc+2} (insn_list 33 (nil))
>     (nil))
> 
> It was done around line 2359 in subst_stack_regs_pat in reg-stack.c.

I now think the bug is in i386.md. The problem starts with

(set (reg/v:DF 26)
        (if_then_else:DF (ne:SI (reg/v:SI 21)
                (reg/v:SI 22))
            (reg/v:DF 25)
            (reg:DF 48)))

Since on x86, all operands of a fp conditional move pattern have to be
on stack and one of the source operands have to be target operand, this
pattern will lead to the problem. When we see this pattern, we should
either not use conditional move or expand it to

(set (reg/v:DF 26) (reg/v:DF 25))
(set (reg/v:DF 26)
        (if_then_else:DF (ne:SI (reg/v:SI 21)
                (reg/v:SI 22))
            (reg/v:DF 26)
            (reg:DF 48)))

Will it work? Can someone provide a patch?

Thanks.


H.J.