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alias sets problem



Several folks have been reporting problems bootstrapping with -O3 or higher
optimization levels on the x86.  Graham even analyzed things far enough to
speculate that there was a bug in the scheduler because it moved a memory
load up past a store to the same location.

For better or worse, the scheduler was actually doing the right thing given
the alias information provided by the front end.

[ ... ]

We had something like this:

(insn/i:HI 272 1678 273 (set (mem/s:HI (reg:SI 5 %edi) 22)
        (reg:HI 1 %dx)) 58 {movhi+1} (nil)
    (expr_list:REG_DEAD (mem:SI (plus:SI (reg:SI 6 %ebp)
                (const_int -292)) 0)
        (nil)))

[ ... ]

(insn:HI 280 278 281 (set (reg:SI 0 %eax)
        (zero_extend:SI (mem/s:HI (reg:SI 5 %edi) 21))) 86 {zero_extendhisi2} (nil)
    (nil))


The scheduler moved insn 280 before insn 272.  The alias sets are obviously
different (21 vs 22 respectively), though the addresses are the same.

Here's a much simpler testcase for the problem:

enum rtx_code  {
 UNKNOWN  , 
};	 
extern int rtx_length[];
extern char *rtx_format[];
typedef struct rtx_def
{
  enum rtx_code code : 16;
} *rtx;
static inline rtx
rtx_alloc (code)
  enum rtx_code  code;
{
  rtx rt;
  (( rt )->code = (  code )) ;
  return rt;
}

rtx
read_rtx ()
     
{
  enum rtx_code  tmp_code;
  int i;
  register char *format_ptr;
  rtx return_rtx;
  register int c;
  return_rtx = rtx_alloc (tmp_code);  
  format_ptr = (rtx_format[( (( return_rtx )->code)  )]) ;
  for (i = 0; i < (rtx_length[ ( (( return_rtx )->code)  )]) ; i++)
    switch (*format_ptr++)
      {
      case 'E':
	  c = read_skip_spaces ();
      }
}


Looking at the .greg dump (just to be consistent) we find:

(insn/i 10 9 11 (set (mem/s:HI (reg/v:SI 5 %edi) 4)
        (reg:HI 0 %ax)) 58 {movhi+1} (nil)
    (expr_list:REG_DEAD (reg:HI 0 %ax)
        (nil)))

[ ... ]

(insn 18 16 19 (set (reg:SI 0 %eax)
        (zero_extend:SI (mem/s:HI (reg/v:SI 5 %edi) 3))) 86 {zero_extendhisi2} (nil)
    (nil))

Note the alias sets are different.  For various reasons the scheduler does not
reorder the insns in the simpler example, but we can both see that the alias
sets are different which is the source of the problem.

I believe the store in question is the assignment to rt->code in rtx_alloc and
the load in question is in his line from read_rtx:

Have fun.....

jeff




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