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Re: GNU C (-5200 COLDFire)


>  and it generates an m5200 machine directory. When I try
>  to boot a coff image, I get the following error on my
>  SBC5206:

dBUG> dn
Downloading COFF 'ucostest.x' from 192.168.1.13
Section:  .text    (Paddr: 0x00010000  Size: 0x00005E64)
Section:  .data    (Paddr: 0x00015E64  Size: 0x00000B50)
Section:  .bss     (Paddr: 0x000169B4  Size: 0x00002248)
27228 bytes read via TFTP
dBUG> go
Unimplemented F-Line Instruction

*** F-line instruction:  A floating point instruction ***

PC: 0001002E SR: 2004 [t.Sm.000...xnZvc]
An: 000169B5 00000000 00000000 00000000 00000000 00000000 000FFFFC
000FFFF4
Dn: 0000224B 000169B4 00000000 00000000 00000000 00000000 00000000
00000000
0001002E: FFFC                 DC.W      0xFFFC
dBUG> dis

*** Hmmm, real assembler code, in UPPERCASE ****

00010000: 207C 0010 0000       MOVEA.L   #0x00100000,A0
00010006: B1FC 0000 0000       CMPA.L    #0x00000000,A0
0001000C: 6702                 BEQ       0x00010010
0001000E: 2E48                 MOVEA.L   A0,A7
00010010: 4E56 FFF8            LINK      A6,#-8
00010014: 223C 0001 69B4       MOVE.L    #0x000169B4,D1
0001001A: 203C 0001 8C00       MOVE.L    #0x00018C00,D0
00010020: B280                 CMP.L     D0,D1
00010022: 6712                 BEQ       0x00010036
00010024: 2041                 MOVEA.L   D1,A0
00010026: 9081                 SUB.L     D1,D0
00010028: 5380                 SUBQ.L    #0x01,D0
0001002A: 4218                 CLR.B     (A0)+
0001002C: 51C8                 DC.W      0x51C8
0001002E: FFFC                 DC.W      0xFFFC

**** Note that your disassembler doesn't know how to cope with the
     two 16 bit words above - a sure sign something's fishy ****

00010030: 4240                 CLR.W     D0
dBUG>

The DC.W 0x51C8 is actually a "Decrement and Branch" instruction;  
dunno why it isn't recognised by your disassembler - I assume the  
5200 has this instruction.  After that it encounters an instruction  
of which the opcode starts with an "F".  These opcodes are reserved  
for floating point operations, which the 5200 presumably doesn't  
have; hence the complaint about "Unimplemented F-Line Instruction".

So somehow the branch instruction is ignored and its displacement  
interpreted as an instruction opcode.

This is where my expertise (based on the 68040) ends.  Apparently  
there's a mismatch between the capabilities assumed for generating  
assembly in the config/m68k/m68k.md file and the real capabilities  
of the 5200.

Hope someone else can help you further,
Toon.


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