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Re: egcs-19980803 (pre-1.1) solaris regressions
- To: "David S. Miller" <davem at dm dot cobaltmicro dot com>
- Subject: Re: egcs-19980803 (pre-1.1) solaris regressions
- From: Jeffrey A Law <law at cygnus dot com>
- Date: Tue, 18 Aug 1998 10:42:04 -0600
- cc: ghazi at caip dot rutgers dot edu, egcs-bugs at cygnus dot com, rth at cygnus dot com, tm at netcom dot com
- Reply-To: law at cygnus dot com
In message <199808181205.FAA23454@dm.cobaltmicro.com>you write:
> Date: Fri, 7 Aug 1998 16:28:45 -0400 (EDT)
> From: "Kaveh R. Ghazi" <email@example.com>
> Hi Kaveh,
> The following errors (except for 930628-1) are regressions
> from prior releases/snapshots, but they don't appear in "make check"
> because the testsuite doesn't run with -fpic/-fPIC.
> ERROR: 930628-1.c: compiled program got signal 11: -O -fno-omit-frame-po
> inter -fpic
> ERROR: 930628-1.c: compiled program got signal 11: -O -fomit-frame-point
> er -fpic
> Interesting, as I have begun to look into these tonight. The cause of
> all these errors is the same thing, and it is related to another
> recent thread on here from which I will quote the following:
[ ... ]
> No Jeff, that is incorrect, it is a _serious_ problem. Something bad
> does in fact happen if the basic blocks get spilled over like this.
> For one, and this is the failure mode we are seeing on Sparc with
> Kaveh's PIC test case failures, reorg can't figure out the correct
> basic block to re-record liveness information when filling delay
> slots, and as a result the lifetime info becomes corrupt and thus will
> cause reorg to clobber registers illegally. For example, in one of
> the Sparc PIC testcases mentioned above reorg changes:
This is a bug in reorg. I belive it is supposed to handle these kinds
of inconsistencies in the rtl and basic_block_* data structures.