]> gcc.gnu.org Git - gcc.git/blame - gcc/ira-color.c
invoke.texi ([Wnarrowing]): Update for non-constants in C++11.
[gcc.git] / gcc / ira-color.c
CommitLineData
058e97ec 1/* IRA allocation based on graph coloring.
23a5b65a 2 Copyright (C) 2006-2014 Free Software Foundation, Inc.
058e97ec
VM
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 3, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
24#include "tm.h"
25#include "rtl.h"
26#include "tm_p.h"
27#include "target.h"
28#include "regs.h"
29#include "flags.h"
30#include "sbitmap.h"
31#include "bitmap.h"
4a8fb1a1 32#include "hash-table.h"
058e97ec
VM
33#include "hard-reg-set.h"
34#include "basic-block.h"
35#include "expr.h"
718f9c0f 36#include "diagnostic-core.h"
058e97ec
VM
37#include "reload.h"
38#include "params.h"
39#include "df.h"
058e97ec
VM
40#include "ira-int.h"
41
27508f5f 42typedef struct allocno_hard_regs *allocno_hard_regs_t;
1756cb66
VM
43
44/* The structure contains information about hard registers can be
27508f5f 45 assigned to allocnos. Usually it is allocno profitable hard
1756cb66
VM
46 registers but in some cases this set can be a bit different. Major
47 reason of the difference is a requirement to use hard register sets
48 that form a tree or a forest (set of trees), i.e. hard register set
49 of a node should contain hard register sets of its subnodes. */
27508f5f 50struct allocno_hard_regs
1756cb66
VM
51{
52 /* Hard registers can be assigned to an allocno. */
53 HARD_REG_SET set;
54 /* Overall (spilling) cost of all allocnos with given register
55 set. */
a9243bfc 56 int64_t cost;
1756cb66
VM
57};
58
27508f5f 59typedef struct allocno_hard_regs_node *allocno_hard_regs_node_t;
1756cb66 60
27508f5f 61/* A node representing allocno hard registers. Such nodes form a
1756cb66 62 forest (set of trees). Each subnode of given node in the forest
27508f5f 63 refers for hard register set (usually allocno profitable hard
1756cb66
VM
64 register set) which is a subset of one referred from given
65 node. */
27508f5f 66struct allocno_hard_regs_node
1756cb66
VM
67{
68 /* Set up number of the node in preorder traversing of the forest. */
69 int preorder_num;
70 /* Used for different calculation like finding conflict size of an
71 allocno. */
72 int check;
73 /* Used for calculation of conflict size of an allocno. The
27508f5f 74 conflict size of the allocno is maximal number of given allocno
1756cb66
VM
75 hard registers needed for allocation of the conflicting allocnos.
76 Given allocno is trivially colored if this number plus the number
77 of hard registers needed for given allocno is not greater than
78 the number of given allocno hard register set. */
79 int conflict_size;
80 /* The number of hard registers given by member hard_regs. */
81 int hard_regs_num;
82 /* The following member is used to form the final forest. */
83 bool used_p;
84 /* Pointer to the corresponding profitable hard registers. */
27508f5f 85 allocno_hard_regs_t hard_regs;
1756cb66
VM
86 /* Parent, first subnode, previous and next node with the same
87 parent in the forest. */
27508f5f 88 allocno_hard_regs_node_t parent, first, prev, next;
1756cb66
VM
89};
90
3b6d1699
VM
91/* Info about changing hard reg costs of an allocno. */
92struct update_cost_record
93{
94 /* Hard regno for which we changed the cost. */
95 int hard_regno;
96 /* Divisor used when we changed the cost of HARD_REGNO. */
97 int divisor;
98 /* Next record for given allocno. */
99 struct update_cost_record *next;
100};
101
1756cb66
VM
102/* To decrease footprint of ira_allocno structure we store all data
103 needed only for coloring in the following structure. */
104struct allocno_color_data
105{
106 /* TRUE value means that the allocno was not removed yet from the
107 conflicting graph during colouring. */
108 unsigned int in_graph_p : 1;
109 /* TRUE if it is put on the stack to make other allocnos
110 colorable. */
111 unsigned int may_be_spilled_p : 1;
27508f5f 112 /* TRUE if the allocno is trivially colorable. */
1756cb66
VM
113 unsigned int colorable_p : 1;
114 /* Number of hard registers of the allocno class really
115 available for the allocno allocation. It is number of the
116 profitable hard regs. */
117 int available_regs_num;
118 /* Allocnos in a bucket (used in coloring) chained by the following
119 two members. */
120 ira_allocno_t next_bucket_allocno;
121 ira_allocno_t prev_bucket_allocno;
122 /* Used for temporary purposes. */
123 int temp;
27508f5f
VM
124 /* Used to exclude repeated processing. */
125 int last_process;
1756cb66
VM
126 /* Profitable hard regs available for this pseudo allocation. It
127 means that the set excludes unavailable hard regs and hard regs
128 conflicting with given pseudo. They should be of the allocno
129 class. */
130 HARD_REG_SET profitable_hard_regs;
27508f5f
VM
131 /* The allocno hard registers node. */
132 allocno_hard_regs_node_t hard_regs_node;
133 /* Array of structures allocno_hard_regs_subnode representing
134 given allocno hard registers node (the 1st element in the array)
135 and all its subnodes in the tree (forest) of allocno hard
1756cb66
VM
136 register nodes (see comments above). */
137 int hard_regs_subnodes_start;
138 /* The length of the previous array. */
139 int hard_regs_subnodes_num;
3b6d1699
VM
140 /* Records about updating allocno hard reg costs from copies. If
141 the allocno did not get expected hard register, these records are
142 used to restore original hard reg costs of allocnos connected to
143 this allocno by copies. */
144 struct update_cost_record *update_cost_records;
bf08fb16
VM
145 /* Threads. We collect allocnos connected by copies into threads
146 and try to assign hard regs to allocnos by threads. */
147 /* Allocno representing all thread. */
148 ira_allocno_t first_thread_allocno;
149 /* Allocnos in thread forms a cycle list through the following
150 member. */
151 ira_allocno_t next_thread_allocno;
152 /* All thread frequency. Defined only for first thread allocno. */
153 int thread_freq;
1756cb66
VM
154};
155
156/* See above. */
27508f5f 157typedef struct allocno_color_data *allocno_color_data_t;
1756cb66 158
27508f5f
VM
159/* Container for storing allocno data concerning coloring. */
160static allocno_color_data_t allocno_color_data;
1756cb66
VM
161
162/* Macro to access the data concerning coloring. */
27508f5f
VM
163#define ALLOCNO_COLOR_DATA(a) ((allocno_color_data_t) ALLOCNO_ADD_DATA (a))
164
165/* Used for finding allocno colorability to exclude repeated allocno
166 processing and for updating preferencing to exclude repeated
167 allocno processing during assignment. */
168static int curr_allocno_process;
1756cb66 169
058e97ec
VM
170/* This file contains code for regional graph coloring, spill/restore
171 code placement optimization, and code helping the reload pass to do
172 a better job. */
173
174/* Bitmap of allocnos which should be colored. */
175static bitmap coloring_allocno_bitmap;
176
177/* Bitmap of allocnos which should be taken into account during
178 coloring. In general case it contains allocnos from
179 coloring_allocno_bitmap plus other already colored conflicting
180 allocnos. */
181static bitmap consideration_allocno_bitmap;
182
058e97ec
VM
183/* All allocnos sorted according their priorities. */
184static ira_allocno_t *sorted_allocnos;
185
186/* Vec representing the stack of allocnos used during coloring. */
9771b263 187static vec<ira_allocno_t> allocno_stack_vec;
058e97ec 188
71af27d2
OH
189/* Helper for qsort comparison callbacks - return a positive integer if
190 X > Y, or a negative value otherwise. Use a conditional expression
191 instead of a difference computation to insulate from possible overflow
192 issues, e.g. X - Y < 0 for some X > 0 and Y < 0. */
193#define SORTGT(x,y) (((x) > (y)) ? 1 : -1)
194
058e97ec
VM
195\f
196
27508f5f 197/* Definition of vector of allocno hard registers. */
fe82cdfb 198
27508f5f 199/* Vector of unique allocno hard registers. */
9771b263 200static vec<allocno_hard_regs_t> allocno_hard_regs_vec;
1756cb66 201
4a8fb1a1 202struct allocno_hard_regs_hasher : typed_noop_remove <allocno_hard_regs>
1756cb66 203{
4a8fb1a1
LC
204 typedef allocno_hard_regs value_type;
205 typedef allocno_hard_regs compare_type;
206 static inline hashval_t hash (const value_type *);
207 static inline bool equal (const value_type *, const compare_type *);
208};
1756cb66 209
4a8fb1a1
LC
210/* Returns hash value for allocno hard registers V. */
211inline hashval_t
212allocno_hard_regs_hasher::hash (const value_type *hv)
213{
1756cb66
VM
214 return iterative_hash (&hv->set, sizeof (HARD_REG_SET), 0);
215}
216
27508f5f 217/* Compares allocno hard registers V1 and V2. */
4a8fb1a1
LC
218inline bool
219allocno_hard_regs_hasher::equal (const value_type *hv1, const compare_type *hv2)
1756cb66 220{
1756cb66
VM
221 return hard_reg_set_equal_p (hv1->set, hv2->set);
222}
223
27508f5f 224/* Hash table of unique allocno hard registers. */
c203e8a7 225static hash_table<allocno_hard_regs_hasher> *allocno_hard_regs_htab;
1756cb66 226
27508f5f
VM
227/* Return allocno hard registers in the hash table equal to HV. */
228static allocno_hard_regs_t
229find_hard_regs (allocno_hard_regs_t hv)
1756cb66 230{
c203e8a7 231 return allocno_hard_regs_htab->find (hv);
1756cb66
VM
232}
233
234/* Insert allocno hard registers HV in the hash table (if it is not
235 there yet) and return the value which in the table. */
27508f5f
VM
236static allocno_hard_regs_t
237insert_hard_regs (allocno_hard_regs_t hv)
1756cb66 238{
c203e8a7 239 allocno_hard_regs **slot = allocno_hard_regs_htab->find_slot (hv, INSERT);
1756cb66
VM
240
241 if (*slot == NULL)
242 *slot = hv;
4a8fb1a1 243 return *slot;
1756cb66
VM
244}
245
27508f5f 246/* Initialize data concerning allocno hard registers. */
1756cb66 247static void
27508f5f 248init_allocno_hard_regs (void)
1756cb66 249{
9771b263 250 allocno_hard_regs_vec.create (200);
c203e8a7
TS
251 allocno_hard_regs_htab
252 = new hash_table<allocno_hard_regs_hasher> (200);
1756cb66
VM
253}
254
27508f5f 255/* Add (or update info about) allocno hard registers with SET and
1756cb66 256 COST. */
27508f5f 257static allocno_hard_regs_t
a9243bfc 258add_allocno_hard_regs (HARD_REG_SET set, int64_t cost)
1756cb66 259{
27508f5f
VM
260 struct allocno_hard_regs temp;
261 allocno_hard_regs_t hv;
1756cb66
VM
262
263 gcc_assert (! hard_reg_set_empty_p (set));
264 COPY_HARD_REG_SET (temp.set, set);
265 if ((hv = find_hard_regs (&temp)) != NULL)
266 hv->cost += cost;
267 else
268 {
27508f5f
VM
269 hv = ((struct allocno_hard_regs *)
270 ira_allocate (sizeof (struct allocno_hard_regs)));
1756cb66
VM
271 COPY_HARD_REG_SET (hv->set, set);
272 hv->cost = cost;
9771b263 273 allocno_hard_regs_vec.safe_push (hv);
1756cb66
VM
274 insert_hard_regs (hv);
275 }
276 return hv;
277}
278
279/* Finalize data concerning allocno hard registers. */
280static void
27508f5f 281finish_allocno_hard_regs (void)
1756cb66
VM
282{
283 int i;
27508f5f 284 allocno_hard_regs_t hv;
1756cb66
VM
285
286 for (i = 0;
9771b263 287 allocno_hard_regs_vec.iterate (i, &hv);
1756cb66
VM
288 i++)
289 ira_free (hv);
c203e8a7
TS
290 delete allocno_hard_regs_htab;
291 allocno_hard_regs_htab = NULL;
9771b263 292 allocno_hard_regs_vec.release ();
1756cb66
VM
293}
294
295/* Sort hard regs according to their frequency of usage. */
296static int
27508f5f 297allocno_hard_regs_compare (const void *v1p, const void *v2p)
1756cb66 298{
27508f5f
VM
299 allocno_hard_regs_t hv1 = *(const allocno_hard_regs_t *) v1p;
300 allocno_hard_regs_t hv2 = *(const allocno_hard_regs_t *) v2p;
1756cb66
VM
301
302 if (hv2->cost > hv1->cost)
303 return 1;
304 else if (hv2->cost < hv1->cost)
305 return -1;
306 else
307 return 0;
308}
309
310\f
311
312/* Used for finding a common ancestor of two allocno hard registers
313 nodes in the forest. We use the current value of
314 'node_check_tick' to mark all nodes from one node to the top and
315 then walking up from another node until we find a marked node.
316
317 It is also used to figure out allocno colorability as a mark that
318 we already reset value of member 'conflict_size' for the forest
319 node corresponding to the processed allocno. */
320static int node_check_tick;
321
322/* Roots of the forest containing hard register sets can be assigned
27508f5f
VM
323 to allocnos. */
324static allocno_hard_regs_node_t hard_regs_roots;
1756cb66 325
27508f5f 326/* Definition of vector of allocno hard register nodes. */
1756cb66
VM
327
328/* Vector used to create the forest. */
9771b263 329static vec<allocno_hard_regs_node_t> hard_regs_node_vec;
1756cb66 330
27508f5f 331/* Create and return allocno hard registers node containing allocno
1756cb66 332 hard registers HV. */
27508f5f
VM
333static allocno_hard_regs_node_t
334create_new_allocno_hard_regs_node (allocno_hard_regs_t hv)
1756cb66 335{
27508f5f 336 allocno_hard_regs_node_t new_node;
1756cb66 337
27508f5f
VM
338 new_node = ((struct allocno_hard_regs_node *)
339 ira_allocate (sizeof (struct allocno_hard_regs_node)));
1756cb66
VM
340 new_node->check = 0;
341 new_node->hard_regs = hv;
342 new_node->hard_regs_num = hard_reg_set_size (hv->set);
343 new_node->first = NULL;
344 new_node->used_p = false;
345 return new_node;
346}
347
27508f5f 348/* Add allocno hard registers node NEW_NODE to the forest on its level
1756cb66
VM
349 given by ROOTS. */
350static void
27508f5f
VM
351add_new_allocno_hard_regs_node_to_forest (allocno_hard_regs_node_t *roots,
352 allocno_hard_regs_node_t new_node)
1756cb66
VM
353{
354 new_node->next = *roots;
355 if (new_node->next != NULL)
356 new_node->next->prev = new_node;
357 new_node->prev = NULL;
358 *roots = new_node;
359}
360
27508f5f 361/* Add allocno hard registers HV (or its best approximation if it is
1756cb66
VM
362 not possible) to the forest on its level given by ROOTS. */
363static void
27508f5f
VM
364add_allocno_hard_regs_to_forest (allocno_hard_regs_node_t *roots,
365 allocno_hard_regs_t hv)
1756cb66
VM
366{
367 unsigned int i, start;
27508f5f 368 allocno_hard_regs_node_t node, prev, new_node;
1756cb66 369 HARD_REG_SET temp_set;
27508f5f 370 allocno_hard_regs_t hv2;
1756cb66 371
9771b263 372 start = hard_regs_node_vec.length ();
1756cb66
VM
373 for (node = *roots; node != NULL; node = node->next)
374 {
375 if (hard_reg_set_equal_p (hv->set, node->hard_regs->set))
376 return;
377 if (hard_reg_set_subset_p (hv->set, node->hard_regs->set))
378 {
27508f5f 379 add_allocno_hard_regs_to_forest (&node->first, hv);
1756cb66
VM
380 return;
381 }
382 if (hard_reg_set_subset_p (node->hard_regs->set, hv->set))
9771b263 383 hard_regs_node_vec.safe_push (node);
1756cb66
VM
384 else if (hard_reg_set_intersect_p (hv->set, node->hard_regs->set))
385 {
386 COPY_HARD_REG_SET (temp_set, hv->set);
387 AND_HARD_REG_SET (temp_set, node->hard_regs->set);
27508f5f
VM
388 hv2 = add_allocno_hard_regs (temp_set, hv->cost);
389 add_allocno_hard_regs_to_forest (&node->first, hv2);
1756cb66
VM
390 }
391 }
9771b263 392 if (hard_regs_node_vec.length ()
1756cb66
VM
393 > start + 1)
394 {
395 /* Create a new node which contains nodes in hard_regs_node_vec. */
396 CLEAR_HARD_REG_SET (temp_set);
397 for (i = start;
9771b263 398 i < hard_regs_node_vec.length ();
1756cb66
VM
399 i++)
400 {
9771b263 401 node = hard_regs_node_vec[i];
1756cb66
VM
402 IOR_HARD_REG_SET (temp_set, node->hard_regs->set);
403 }
27508f5f
VM
404 hv = add_allocno_hard_regs (temp_set, hv->cost);
405 new_node = create_new_allocno_hard_regs_node (hv);
1756cb66
VM
406 prev = NULL;
407 for (i = start;
9771b263 408 i < hard_regs_node_vec.length ();
1756cb66
VM
409 i++)
410 {
9771b263 411 node = hard_regs_node_vec[i];
1756cb66
VM
412 if (node->prev == NULL)
413 *roots = node->next;
414 else
415 node->prev->next = node->next;
416 if (node->next != NULL)
417 node->next->prev = node->prev;
418 if (prev == NULL)
419 new_node->first = node;
420 else
421 prev->next = node;
422 node->prev = prev;
423 node->next = NULL;
424 prev = node;
425 }
27508f5f 426 add_new_allocno_hard_regs_node_to_forest (roots, new_node);
1756cb66 427 }
9771b263 428 hard_regs_node_vec.truncate (start);
1756cb66
VM
429}
430
27508f5f 431/* Add allocno hard registers nodes starting with the forest level
1756cb66
VM
432 given by FIRST which contains biggest set inside SET. */
433static void
27508f5f 434collect_allocno_hard_regs_cover (allocno_hard_regs_node_t first,
1756cb66
VM
435 HARD_REG_SET set)
436{
27508f5f 437 allocno_hard_regs_node_t node;
1756cb66
VM
438
439 ira_assert (first != NULL);
440 for (node = first; node != NULL; node = node->next)
441 if (hard_reg_set_subset_p (node->hard_regs->set, set))
9771b263 442 hard_regs_node_vec.safe_push (node);
1756cb66 443 else if (hard_reg_set_intersect_p (set, node->hard_regs->set))
27508f5f 444 collect_allocno_hard_regs_cover (node->first, set);
1756cb66
VM
445}
446
27508f5f 447/* Set up field parent as PARENT in all allocno hard registers nodes
1756cb66
VM
448 in forest given by FIRST. */
449static void
27508f5f
VM
450setup_allocno_hard_regs_nodes_parent (allocno_hard_regs_node_t first,
451 allocno_hard_regs_node_t parent)
1756cb66 452{
27508f5f 453 allocno_hard_regs_node_t node;
1756cb66
VM
454
455 for (node = first; node != NULL; node = node->next)
456 {
457 node->parent = parent;
27508f5f 458 setup_allocno_hard_regs_nodes_parent (node->first, node);
1756cb66
VM
459 }
460}
461
27508f5f 462/* Return allocno hard registers node which is a first common ancestor
1756cb66 463 node of FIRST and SECOND in the forest. */
27508f5f
VM
464static allocno_hard_regs_node_t
465first_common_ancestor_node (allocno_hard_regs_node_t first,
466 allocno_hard_regs_node_t second)
1756cb66 467{
27508f5f 468 allocno_hard_regs_node_t node;
1756cb66
VM
469
470 node_check_tick++;
471 for (node = first; node != NULL; node = node->parent)
472 node->check = node_check_tick;
473 for (node = second; node != NULL; node = node->parent)
474 if (node->check == node_check_tick)
475 return node;
476 return first_common_ancestor_node (second, first);
477}
478
479/* Print hard reg set SET to F. */
480static void
481print_hard_reg_set (FILE *f, HARD_REG_SET set, bool new_line_p)
482{
483 int i, start;
484
485 for (start = -1, i = 0; i < FIRST_PSEUDO_REGISTER; i++)
486 {
487 if (TEST_HARD_REG_BIT (set, i))
488 {
489 if (i == 0 || ! TEST_HARD_REG_BIT (set, i - 1))
490 start = i;
491 }
492 if (start >= 0
493 && (i == FIRST_PSEUDO_REGISTER - 1 || ! TEST_HARD_REG_BIT (set, i)))
494 {
495 if (start == i - 1)
496 fprintf (f, " %d", start);
497 else if (start == i - 2)
498 fprintf (f, " %d %d", start, start + 1);
499 else
500 fprintf (f, " %d-%d", start, i - 1);
501 start = -1;
502 }
503 }
504 if (new_line_p)
505 fprintf (f, "\n");
506}
507
27508f5f 508/* Print allocno hard register subforest given by ROOTS and its LEVEL
1756cb66
VM
509 to F. */
510static void
27508f5f 511print_hard_regs_subforest (FILE *f, allocno_hard_regs_node_t roots,
1756cb66
VM
512 int level)
513{
514 int i;
27508f5f 515 allocno_hard_regs_node_t node;
1756cb66
VM
516
517 for (node = roots; node != NULL; node = node->next)
518 {
519 fprintf (f, " ");
520 for (i = 0; i < level * 2; i++)
521 fprintf (f, " ");
522 fprintf (f, "%d:(", node->preorder_num);
523 print_hard_reg_set (f, node->hard_regs->set, false);
a9243bfc 524 fprintf (f, ")@%"PRId64"\n", node->hard_regs->cost);
1756cb66
VM
525 print_hard_regs_subforest (f, node->first, level + 1);
526 }
527}
528
27508f5f 529/* Print the allocno hard register forest to F. */
1756cb66
VM
530static void
531print_hard_regs_forest (FILE *f)
532{
533 fprintf (f, " Hard reg set forest:\n");
534 print_hard_regs_subforest (f, hard_regs_roots, 1);
535}
536
27508f5f 537/* Print the allocno hard register forest to stderr. */
1756cb66
VM
538void
539ira_debug_hard_regs_forest (void)
540{
541 print_hard_regs_forest (stderr);
542}
543
27508f5f 544/* Remove unused allocno hard registers nodes from forest given by its
1756cb66
VM
545 *ROOTS. */
546static void
27508f5f 547remove_unused_allocno_hard_regs_nodes (allocno_hard_regs_node_t *roots)
1756cb66 548{
27508f5f 549 allocno_hard_regs_node_t node, prev, next, last;
1756cb66
VM
550
551 for (prev = NULL, node = *roots; node != NULL; node = next)
552 {
553 next = node->next;
554 if (node->used_p)
555 {
27508f5f 556 remove_unused_allocno_hard_regs_nodes (&node->first);
1756cb66
VM
557 prev = node;
558 }
559 else
560 {
561 for (last = node->first;
562 last != NULL && last->next != NULL;
563 last = last->next)
564 ;
565 if (last != NULL)
566 {
567 if (prev == NULL)
568 *roots = node->first;
569 else
570 prev->next = node->first;
571 if (next != NULL)
572 next->prev = last;
573 last->next = next;
574 next = node->first;
575 }
576 else
577 {
578 if (prev == NULL)
579 *roots = next;
580 else
581 prev->next = next;
582 if (next != NULL)
583 next->prev = prev;
584 }
585 ira_free (node);
586 }
587 }
588}
589
27508f5f 590/* Set up fields preorder_num starting with START_NUM in all allocno
1756cb66
VM
591 hard registers nodes in forest given by FIRST. Return biggest set
592 PREORDER_NUM increased by 1. */
593static int
27508f5f
VM
594enumerate_allocno_hard_regs_nodes (allocno_hard_regs_node_t first,
595 allocno_hard_regs_node_t parent,
596 int start_num)
1756cb66 597{
27508f5f 598 allocno_hard_regs_node_t node;
1756cb66
VM
599
600 for (node = first; node != NULL; node = node->next)
601 {
602 node->preorder_num = start_num++;
603 node->parent = parent;
27508f5f
VM
604 start_num = enumerate_allocno_hard_regs_nodes (node->first, node,
605 start_num);
1756cb66
VM
606 }
607 return start_num;
608}
609
27508f5f
VM
610/* Number of allocno hard registers nodes in the forest. */
611static int allocno_hard_regs_nodes_num;
1756cb66 612
27508f5f
VM
613/* Table preorder number of allocno hard registers node in the forest
614 -> the allocno hard registers node. */
615static allocno_hard_regs_node_t *allocno_hard_regs_nodes;
1756cb66
VM
616
617/* See below. */
27508f5f 618typedef struct allocno_hard_regs_subnode *allocno_hard_regs_subnode_t;
1756cb66
VM
619
620/* The structure is used to describes all subnodes (not only immediate
27508f5f 621 ones) in the mentioned above tree for given allocno hard register
1756cb66
VM
622 node. The usage of such data accelerates calculation of
623 colorability of given allocno. */
27508f5f 624struct allocno_hard_regs_subnode
1756cb66
VM
625{
626 /* The conflict size of conflicting allocnos whose hard register
627 sets are equal sets (plus supersets if given node is given
27508f5f 628 allocno hard registers node) of one in the given node. */
1756cb66
VM
629 int left_conflict_size;
630 /* The summary conflict size of conflicting allocnos whose hard
631 register sets are strict subsets of one in the given node.
632 Overall conflict size is
633 left_conflict_subnodes_size
634 + MIN (max_node_impact - left_conflict_subnodes_size,
635 left_conflict_size)
636 */
637 short left_conflict_subnodes_size;
638 short max_node_impact;
639};
640
27508f5f
VM
641/* Container for hard regs subnodes of all allocnos. */
642static allocno_hard_regs_subnode_t allocno_hard_regs_subnodes;
1756cb66 643
27508f5f
VM
644/* Table (preorder number of allocno hard registers node in the
645 forest, preorder number of allocno hard registers subnode) -> index
1756cb66
VM
646 of the subnode relative to the node. -1 if it is not a
647 subnode. */
27508f5f 648static int *allocno_hard_regs_subnode_index;
1756cb66 649
27508f5f
VM
650/* Setup arrays ALLOCNO_HARD_REGS_NODES and
651 ALLOCNO_HARD_REGS_SUBNODE_INDEX. */
1756cb66 652static void
27508f5f 653setup_allocno_hard_regs_subnode_index (allocno_hard_regs_node_t first)
1756cb66 654{
27508f5f 655 allocno_hard_regs_node_t node, parent;
1756cb66
VM
656 int index;
657
658 for (node = first; node != NULL; node = node->next)
659 {
27508f5f 660 allocno_hard_regs_nodes[node->preorder_num] = node;
1756cb66
VM
661 for (parent = node; parent != NULL; parent = parent->parent)
662 {
27508f5f
VM
663 index = parent->preorder_num * allocno_hard_regs_nodes_num;
664 allocno_hard_regs_subnode_index[index + node->preorder_num]
1756cb66
VM
665 = node->preorder_num - parent->preorder_num;
666 }
27508f5f 667 setup_allocno_hard_regs_subnode_index (node->first);
1756cb66
VM
668 }
669}
670
27508f5f 671/* Count all allocno hard registers nodes in tree ROOT. */
1756cb66 672static int
27508f5f 673get_allocno_hard_regs_subnodes_num (allocno_hard_regs_node_t root)
1756cb66
VM
674{
675 int len = 1;
676
677 for (root = root->first; root != NULL; root = root->next)
27508f5f 678 len += get_allocno_hard_regs_subnodes_num (root);
1756cb66
VM
679 return len;
680}
681
27508f5f 682/* Build the forest of allocno hard registers nodes and assign each
1756cb66
VM
683 allocno a node from the forest. */
684static void
27508f5f 685form_allocno_hard_regs_nodes_forest (void)
1756cb66
VM
686{
687 unsigned int i, j, size, len;
27508f5f 688 int start;
1756cb66 689 ira_allocno_t a;
27508f5f 690 allocno_hard_regs_t hv;
1756cb66
VM
691 bitmap_iterator bi;
692 HARD_REG_SET temp;
27508f5f
VM
693 allocno_hard_regs_node_t node, allocno_hard_regs_node;
694 allocno_color_data_t allocno_data;
1756cb66
VM
695
696 node_check_tick = 0;
27508f5f 697 init_allocno_hard_regs ();
1756cb66 698 hard_regs_roots = NULL;
9771b263 699 hard_regs_node_vec.create (100);
1756cb66
VM
700 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
701 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, i))
702 {
703 CLEAR_HARD_REG_SET (temp);
704 SET_HARD_REG_BIT (temp, i);
27508f5f
VM
705 hv = add_allocno_hard_regs (temp, 0);
706 node = create_new_allocno_hard_regs_node (hv);
707 add_new_allocno_hard_regs_node_to_forest (&hard_regs_roots, node);
1756cb66 708 }
9771b263 709 start = allocno_hard_regs_vec.length ();
1756cb66
VM
710 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
711 {
712 a = ira_allocnos[i];
27508f5f
VM
713 allocno_data = ALLOCNO_COLOR_DATA (a);
714
715 if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs))
716 continue;
717 hv = (add_allocno_hard_regs
718 (allocno_data->profitable_hard_regs,
719 ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a)));
1756cb66
VM
720 }
721 SET_HARD_REG_SET (temp);
722 AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs);
27508f5f 723 add_allocno_hard_regs (temp, 0);
9771b263
DN
724 qsort (allocno_hard_regs_vec.address () + start,
725 allocno_hard_regs_vec.length () - start,
27508f5f 726 sizeof (allocno_hard_regs_t), allocno_hard_regs_compare);
1756cb66 727 for (i = start;
9771b263 728 allocno_hard_regs_vec.iterate (i, &hv);
1756cb66
VM
729 i++)
730 {
27508f5f 731 add_allocno_hard_regs_to_forest (&hard_regs_roots, hv);
9771b263 732 ira_assert (hard_regs_node_vec.length () == 0);
1756cb66
VM
733 }
734 /* We need to set up parent fields for right work of
735 first_common_ancestor_node. */
27508f5f 736 setup_allocno_hard_regs_nodes_parent (hard_regs_roots, NULL);
1756cb66
VM
737 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
738 {
739 a = ira_allocnos[i];
27508f5f
VM
740 allocno_data = ALLOCNO_COLOR_DATA (a);
741 if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs))
742 continue;
9771b263 743 hard_regs_node_vec.truncate (0);
27508f5f
VM
744 collect_allocno_hard_regs_cover (hard_regs_roots,
745 allocno_data->profitable_hard_regs);
746 allocno_hard_regs_node = NULL;
9771b263 747 for (j = 0; hard_regs_node_vec.iterate (j, &node); j++)
27508f5f
VM
748 allocno_hard_regs_node
749 = (j == 0
750 ? node
751 : first_common_ancestor_node (node, allocno_hard_regs_node));
752 /* That is a temporary storage. */
753 allocno_hard_regs_node->used_p = true;
754 allocno_data->hard_regs_node = allocno_hard_regs_node;
1756cb66
VM
755 }
756 ira_assert (hard_regs_roots->next == NULL);
757 hard_regs_roots->used_p = true;
27508f5f
VM
758 remove_unused_allocno_hard_regs_nodes (&hard_regs_roots);
759 allocno_hard_regs_nodes_num
760 = enumerate_allocno_hard_regs_nodes (hard_regs_roots, NULL, 0);
761 allocno_hard_regs_nodes
762 = ((allocno_hard_regs_node_t *)
763 ira_allocate (allocno_hard_regs_nodes_num
764 * sizeof (allocno_hard_regs_node_t)));
765 size = allocno_hard_regs_nodes_num * allocno_hard_regs_nodes_num;
766 allocno_hard_regs_subnode_index
1756cb66
VM
767 = (int *) ira_allocate (size * sizeof (int));
768 for (i = 0; i < size; i++)
27508f5f
VM
769 allocno_hard_regs_subnode_index[i] = -1;
770 setup_allocno_hard_regs_subnode_index (hard_regs_roots);
1756cb66
VM
771 start = 0;
772 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
773 {
774 a = ira_allocnos[i];
27508f5f
VM
775 allocno_data = ALLOCNO_COLOR_DATA (a);
776 if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs))
777 continue;
778 len = get_allocno_hard_regs_subnodes_num (allocno_data->hard_regs_node);
779 allocno_data->hard_regs_subnodes_start = start;
780 allocno_data->hard_regs_subnodes_num = len;
781 start += len;
1756cb66 782 }
27508f5f
VM
783 allocno_hard_regs_subnodes
784 = ((allocno_hard_regs_subnode_t)
785 ira_allocate (sizeof (struct allocno_hard_regs_subnode) * start));
9771b263 786 hard_regs_node_vec.release ();
1756cb66
VM
787}
788
27508f5f 789/* Free tree of allocno hard registers nodes given by its ROOT. */
1756cb66 790static void
27508f5f 791finish_allocno_hard_regs_nodes_tree (allocno_hard_regs_node_t root)
1756cb66 792{
27508f5f 793 allocno_hard_regs_node_t child, next;
1756cb66
VM
794
795 for (child = root->first; child != NULL; child = next)
796 {
797 next = child->next;
27508f5f 798 finish_allocno_hard_regs_nodes_tree (child);
1756cb66
VM
799 }
800 ira_free (root);
801}
802
27508f5f 803/* Finish work with the forest of allocno hard registers nodes. */
1756cb66 804static void
27508f5f 805finish_allocno_hard_regs_nodes_forest (void)
1756cb66 806{
27508f5f 807 allocno_hard_regs_node_t node, next;
1756cb66 808
27508f5f 809 ira_free (allocno_hard_regs_subnodes);
1756cb66
VM
810 for (node = hard_regs_roots; node != NULL; node = next)
811 {
812 next = node->next;
27508f5f 813 finish_allocno_hard_regs_nodes_tree (node);
1756cb66 814 }
27508f5f
VM
815 ira_free (allocno_hard_regs_nodes);
816 ira_free (allocno_hard_regs_subnode_index);
817 finish_allocno_hard_regs ();
1756cb66
VM
818}
819
820/* Set up left conflict sizes and left conflict subnodes sizes of hard
821 registers subnodes of allocno A. Return TRUE if allocno A is
822 trivially colorable. */
3553f0bb 823static bool
1756cb66 824setup_left_conflict_sizes_p (ira_allocno_t a)
3553f0bb 825{
27508f5f
VM
826 int i, k, nobj, start;
827 int conflict_size, left_conflict_subnodes_size, node_preorder_num;
1756cb66 828 allocno_color_data_t data;
27508f5f
VM
829 HARD_REG_SET profitable_hard_regs;
830 allocno_hard_regs_subnode_t subnodes;
831 allocno_hard_regs_node_t node;
832 HARD_REG_SET node_set;
ac0ab4f7 833
1756cb66
VM
834 nobj = ALLOCNO_NUM_OBJECTS (a);
835 conflict_size = 0;
836 data = ALLOCNO_COLOR_DATA (a);
27508f5f
VM
837 subnodes = allocno_hard_regs_subnodes + data->hard_regs_subnodes_start;
838 COPY_HARD_REG_SET (profitable_hard_regs, data->profitable_hard_regs);
839 node = data->hard_regs_node;
840 node_preorder_num = node->preorder_num;
841 COPY_HARD_REG_SET (node_set, node->hard_regs->set);
842 node_check_tick++;
1756cb66
VM
843 for (k = 0; k < nobj; k++)
844 {
1756cb66
VM
845 ira_object_t obj = ALLOCNO_OBJECT (a, k);
846 ira_object_t conflict_obj;
847 ira_object_conflict_iterator oci;
1756cb66 848
1756cb66
VM
849 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
850 {
851 int size;
852 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
27508f5f 853 allocno_hard_regs_node_t conflict_node, temp_node;
1756cb66 854 HARD_REG_SET conflict_node_set;
27508f5f 855 allocno_color_data_t conflict_data;
1756cb66 856
27508f5f 857 conflict_data = ALLOCNO_COLOR_DATA (conflict_a);
1756cb66
VM
858 if (! ALLOCNO_COLOR_DATA (conflict_a)->in_graph_p
859 || ! hard_reg_set_intersect_p (profitable_hard_regs,
27508f5f 860 conflict_data
1756cb66
VM
861 ->profitable_hard_regs))
862 continue;
27508f5f 863 conflict_node = conflict_data->hard_regs_node;
1756cb66
VM
864 COPY_HARD_REG_SET (conflict_node_set, conflict_node->hard_regs->set);
865 if (hard_reg_set_subset_p (node_set, conflict_node_set))
866 temp_node = node;
867 else
868 {
869 ira_assert (hard_reg_set_subset_p (conflict_node_set, node_set));
870 temp_node = conflict_node;
871 }
872 if (temp_node->check != node_check_tick)
873 {
874 temp_node->check = node_check_tick;
875 temp_node->conflict_size = 0;
876 }
877 size = (ira_reg_class_max_nregs
878 [ALLOCNO_CLASS (conflict_a)][ALLOCNO_MODE (conflict_a)]);
879 if (ALLOCNO_NUM_OBJECTS (conflict_a) > 1)
880 /* We will deal with the subwords individually. */
881 size = 1;
882 temp_node->conflict_size += size;
883 }
27508f5f
VM
884 }
885 for (i = 0; i < data->hard_regs_subnodes_num; i++)
886 {
887 allocno_hard_regs_node_t temp_node;
888
889 temp_node = allocno_hard_regs_nodes[i + node_preorder_num];
890 ira_assert (temp_node->preorder_num == i + node_preorder_num);
891 subnodes[i].left_conflict_size = (temp_node->check != node_check_tick
892 ? 0 : temp_node->conflict_size);
893 if (hard_reg_set_subset_p (temp_node->hard_regs->set,
894 profitable_hard_regs))
895 subnodes[i].max_node_impact = temp_node->hard_regs_num;
896 else
1756cb66 897 {
27508f5f
VM
898 HARD_REG_SET temp_set;
899 int j, n, hard_regno;
900 enum reg_class aclass;
901
902 COPY_HARD_REG_SET (temp_set, temp_node->hard_regs->set);
903 AND_HARD_REG_SET (temp_set, profitable_hard_regs);
904 aclass = ALLOCNO_CLASS (a);
905 for (n = 0, j = ira_class_hard_regs_num[aclass] - 1; j >= 0; j--)
1756cb66 906 {
27508f5f
VM
907 hard_regno = ira_class_hard_regs[aclass][j];
908 if (TEST_HARD_REG_BIT (temp_set, hard_regno))
909 n++;
1756cb66 910 }
27508f5f 911 subnodes[i].max_node_impact = n;
1756cb66 912 }
27508f5f
VM
913 subnodes[i].left_conflict_subnodes_size = 0;
914 }
915 start = node_preorder_num * allocno_hard_regs_nodes_num;
916 for (i = data->hard_regs_subnodes_num - 1; i >= 0; i--)
917 {
918 int size, parent_i;
919 allocno_hard_regs_node_t parent;
920
921 size = (subnodes[i].left_conflict_subnodes_size
922 + MIN (subnodes[i].max_node_impact
923 - subnodes[i].left_conflict_subnodes_size,
924 subnodes[i].left_conflict_size));
925 parent = allocno_hard_regs_nodes[i + node_preorder_num]->parent;
926 if (parent == NULL)
927 continue;
928 parent_i
929 = allocno_hard_regs_subnode_index[start + parent->preorder_num];
930 if (parent_i < 0)
931 continue;
932 subnodes[parent_i].left_conflict_subnodes_size += size;
1756cb66 933 }
27508f5f
VM
934 left_conflict_subnodes_size = subnodes[0].left_conflict_subnodes_size;
935 conflict_size
936 += (left_conflict_subnodes_size
937 + MIN (subnodes[0].max_node_impact - left_conflict_subnodes_size,
938 subnodes[0].left_conflict_size));
1756cb66
VM
939 conflict_size += ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)];
940 data->colorable_p = conflict_size <= data->available_regs_num;
941 return data->colorable_p;
942}
ac0ab4f7 943
1756cb66 944/* Update left conflict sizes of hard registers subnodes of allocno A
27508f5f
VM
945 after removing allocno REMOVED_A with SIZE from the conflict graph.
946 Return TRUE if A is trivially colorable. */
1756cb66
VM
947static bool
948update_left_conflict_sizes_p (ira_allocno_t a,
27508f5f 949 ira_allocno_t removed_a, int size)
1756cb66 950{
27508f5f 951 int i, conflict_size, before_conflict_size, diff, start;
1756cb66 952 int node_preorder_num, parent_i;
27508f5f
VM
953 allocno_hard_regs_node_t node, removed_node, parent;
954 allocno_hard_regs_subnode_t subnodes;
1756cb66 955 allocno_color_data_t data = ALLOCNO_COLOR_DATA (a);
1756cb66
VM
956
957 ira_assert (! data->colorable_p);
27508f5f
VM
958 node = data->hard_regs_node;
959 node_preorder_num = node->preorder_num;
960 removed_node = ALLOCNO_COLOR_DATA (removed_a)->hard_regs_node;
961 ira_assert (hard_reg_set_subset_p (removed_node->hard_regs->set,
962 node->hard_regs->set)
963 || hard_reg_set_subset_p (node->hard_regs->set,
964 removed_node->hard_regs->set));
965 start = node_preorder_num * allocno_hard_regs_nodes_num;
966 i = allocno_hard_regs_subnode_index[start + removed_node->preorder_num];
967 if (i < 0)
968 i = 0;
969 subnodes = allocno_hard_regs_subnodes + data->hard_regs_subnodes_start;
970 before_conflict_size
971 = (subnodes[i].left_conflict_subnodes_size
972 + MIN (subnodes[i].max_node_impact
973 - subnodes[i].left_conflict_subnodes_size,
974 subnodes[i].left_conflict_size));
975 subnodes[i].left_conflict_size -= size;
976 for (;;)
ac0ab4f7 977 {
27508f5f
VM
978 conflict_size
979 = (subnodes[i].left_conflict_subnodes_size
980 + MIN (subnodes[i].max_node_impact
981 - subnodes[i].left_conflict_subnodes_size,
982 subnodes[i].left_conflict_size));
983 if ((diff = before_conflict_size - conflict_size) == 0)
984 break;
985 ira_assert (conflict_size < before_conflict_size);
986 parent = allocno_hard_regs_nodes[i + node_preorder_num]->parent;
987 if (parent == NULL)
988 break;
989 parent_i
990 = allocno_hard_regs_subnode_index[start + parent->preorder_num];
991 if (parent_i < 0)
992 break;
993 i = parent_i;
1756cb66
VM
994 before_conflict_size
995 = (subnodes[i].left_conflict_subnodes_size
996 + MIN (subnodes[i].max_node_impact
997 - subnodes[i].left_conflict_subnodes_size,
998 subnodes[i].left_conflict_size));
27508f5f 999 subnodes[i].left_conflict_subnodes_size -= diff;
ac0ab4f7 1000 }
27508f5f
VM
1001 if (i != 0
1002 || (conflict_size
1003 + ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]
1004 > data->available_regs_num))
1005 return false;
1006 data->colorable_p = true;
1007 return true;
3553f0bb
VM
1008}
1009
27508f5f 1010/* Return true if allocno A has empty profitable hard regs. */
3553f0bb 1011static bool
1756cb66 1012empty_profitable_hard_regs (ira_allocno_t a)
3553f0bb 1013{
27508f5f 1014 allocno_color_data_t data = ALLOCNO_COLOR_DATA (a);
1756cb66 1015
27508f5f 1016 return hard_reg_set_empty_p (data->profitable_hard_regs);
3553f0bb
VM
1017}
1018
1756cb66
VM
1019/* Set up profitable hard registers for each allocno being
1020 colored. */
1021static void
1022setup_profitable_hard_regs (void)
1023{
1024 unsigned int i;
1025 int j, k, nobj, hard_regno, nregs, class_size;
1026 ira_allocno_t a;
1027 bitmap_iterator bi;
1028 enum reg_class aclass;
1029 enum machine_mode mode;
27508f5f 1030 allocno_color_data_t data;
1756cb66 1031
8d189b3f
VM
1032 /* Initial set up from allocno classes and explicitly conflicting
1033 hard regs. */
1756cb66
VM
1034 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
1035 {
1036 a = ira_allocnos[i];
1037 if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS)
1038 continue;
27508f5f
VM
1039 data = ALLOCNO_COLOR_DATA (a);
1040 if (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL
1041 && ALLOCNO_CLASS_COST (a) > ALLOCNO_MEMORY_COST (a))
1042 CLEAR_HARD_REG_SET (data->profitable_hard_regs);
1043 else
1756cb66 1044 {
a2c19e93 1045 mode = ALLOCNO_MODE (a);
27508f5f 1046 COPY_HARD_REG_SET (data->profitable_hard_regs,
a2c19e93 1047 ira_useful_class_mode_regs[aclass][mode]);
27508f5f
VM
1048 nobj = ALLOCNO_NUM_OBJECTS (a);
1049 for (k = 0; k < nobj; k++)
1756cb66 1050 {
27508f5f
VM
1051 ira_object_t obj = ALLOCNO_OBJECT (a, k);
1052
1053 AND_COMPL_HARD_REG_SET (data->profitable_hard_regs,
1756cb66
VM
1054 OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
1055 }
1056 }
1057 }
8d189b3f 1058 /* Exclude hard regs already assigned for conflicting objects. */
1756cb66
VM
1059 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, i, bi)
1060 {
1061 a = ira_allocnos[i];
1062 if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS
1063 || ! ALLOCNO_ASSIGNED_P (a)
1064 || (hard_regno = ALLOCNO_HARD_REGNO (a)) < 0)
1065 continue;
1066 mode = ALLOCNO_MODE (a);
1067 nregs = hard_regno_nregs[hard_regno][mode];
1068 nobj = ALLOCNO_NUM_OBJECTS (a);
1069 for (k = 0; k < nobj; k++)
1070 {
1071 ira_object_t obj = ALLOCNO_OBJECT (a, k);
1072 ira_object_t conflict_obj;
1073 ira_object_conflict_iterator oci;
1074
1075 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
1076 {
27508f5f
VM
1077 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
1078
1079 /* We can process the conflict allocno repeatedly with
1080 the same result. */
1756cb66
VM
1081 if (nregs == nobj && nregs > 1)
1082 {
1083 int num = OBJECT_SUBWORD (conflict_obj);
1084
2805e6c0 1085 if (REG_WORDS_BIG_ENDIAN)
1756cb66 1086 CLEAR_HARD_REG_BIT
27508f5f 1087 (ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs,
1756cb66
VM
1088 hard_regno + nobj - num - 1);
1089 else
1090 CLEAR_HARD_REG_BIT
27508f5f 1091 (ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs,
1756cb66
VM
1092 hard_regno + num);
1093 }
1094 else
1095 AND_COMPL_HARD_REG_SET
27508f5f 1096 (ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs,
1756cb66
VM
1097 ira_reg_mode_hard_regset[hard_regno][mode]);
1098 }
1099 }
1100 }
8d189b3f 1101 /* Exclude too costly hard regs. */
1756cb66
VM
1102 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
1103 {
1104 int min_cost = INT_MAX;
1105 int *costs;
1106
1107 a = ira_allocnos[i];
1108 if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS
1109 || empty_profitable_hard_regs (a))
1110 continue;
27508f5f 1111 data = ALLOCNO_COLOR_DATA (a);
1756cb66 1112 mode = ALLOCNO_MODE (a);
27508f5f
VM
1113 if ((costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a)) != NULL
1114 || (costs = ALLOCNO_HARD_REG_COSTS (a)) != NULL)
1756cb66 1115 {
27508f5f
VM
1116 class_size = ira_class_hard_regs_num[aclass];
1117 for (j = 0; j < class_size; j++)
1756cb66 1118 {
27508f5f
VM
1119 hard_regno = ira_class_hard_regs[aclass][j];
1120 if (! TEST_HARD_REG_BIT (data->profitable_hard_regs,
1121 hard_regno))
1122 continue;
1123 if (ALLOCNO_UPDATED_MEMORY_COST (a) < costs[j])
1124 CLEAR_HARD_REG_BIT (data->profitable_hard_regs,
1125 hard_regno);
1126 else if (min_cost > costs[j])
1127 min_cost = costs[j];
1756cb66 1128 }
1756cb66 1129 }
27508f5f
VM
1130 else if (ALLOCNO_UPDATED_MEMORY_COST (a)
1131 < ALLOCNO_UPDATED_CLASS_COST (a))
1132 CLEAR_HARD_REG_SET (data->profitable_hard_regs);
1756cb66
VM
1133 if (ALLOCNO_UPDATED_CLASS_COST (a) > min_cost)
1134 ALLOCNO_UPDATED_CLASS_COST (a) = min_cost;
1135 }
1136}
3553f0bb
VM
1137
1138\f
1139
058e97ec
VM
1140/* This page contains functions used to choose hard registers for
1141 allocnos. */
1142
3b6d1699
VM
1143/* Pool for update cost records. */
1144static alloc_pool update_cost_record_pool;
1145
1146/* Initiate update cost records. */
1147static void
1148init_update_cost_records (void)
1149{
1150 update_cost_record_pool
1151 = create_alloc_pool ("update cost records",
1152 sizeof (struct update_cost_record), 100);
1153}
1154
1155/* Return new update cost record with given params. */
1156static struct update_cost_record *
1157get_update_cost_record (int hard_regno, int divisor,
1158 struct update_cost_record *next)
1159{
1160 struct update_cost_record *record;
1161
1162 record = (struct update_cost_record *) pool_alloc (update_cost_record_pool);
1163 record->hard_regno = hard_regno;
1164 record->divisor = divisor;
1165 record->next = next;
1166 return record;
1167}
1168
1169/* Free memory for all records in LIST. */
1170static void
1171free_update_cost_record_list (struct update_cost_record *list)
1172{
1173 struct update_cost_record *next;
1174
1175 while (list != NULL)
1176 {
1177 next = list->next;
1178 pool_free (update_cost_record_pool, list);
1179 list = next;
1180 }
1181}
1182
1183/* Free memory allocated for all update cost records. */
1184static void
1185finish_update_cost_records (void)
1186{
1187 free_alloc_pool (update_cost_record_pool);
1188}
1189
058e97ec
VM
1190/* Array whose element value is TRUE if the corresponding hard
1191 register was already allocated for an allocno. */
1192static bool allocated_hardreg_p[FIRST_PSEUDO_REGISTER];
1193
f754734f 1194/* Describes one element in a queue of allocnos whose costs need to be
1756cb66
VM
1195 updated. Each allocno in the queue is known to have an allocno
1196 class. */
f35bf7a9
RS
1197struct update_cost_queue_elem
1198{
f754734f
RS
1199 /* This element is in the queue iff CHECK == update_cost_check. */
1200 int check;
1201
1202 /* COST_HOP_DIVISOR**N, where N is the length of the shortest path
1203 connecting this allocno to the one being allocated. */
1204 int divisor;
1205
3b6d1699
VM
1206 /* Allocno from which we are chaning costs of connected allocnos.
1207 It is used not go back in graph of allocnos connected by
1208 copies. */
1209 ira_allocno_t from;
1210
f754734f
RS
1211 /* The next allocno in the queue, or null if this is the last element. */
1212 ira_allocno_t next;
1213};
1214
1215/* The first element in a queue of allocnos whose copy costs need to be
1216 updated. Null if the queue is empty. */
1217static ira_allocno_t update_cost_queue;
1218
1219/* The last element in the queue described by update_cost_queue.
1220 Not valid if update_cost_queue is null. */
1221static struct update_cost_queue_elem *update_cost_queue_tail;
1222
1223/* A pool of elements in the queue described by update_cost_queue.
1224 Elements are indexed by ALLOCNO_NUM. */
1225static struct update_cost_queue_elem *update_cost_queue_elems;
058e97ec 1226
3b6d1699 1227/* The current value of update_costs_from_copies call count. */
058e97ec
VM
1228static int update_cost_check;
1229
1230/* Allocate and initialize data necessary for function
c73ccc80 1231 update_costs_from_copies. */
058e97ec
VM
1232static void
1233initiate_cost_update (void)
1234{
f754734f
RS
1235 size_t size;
1236
1237 size = ira_allocnos_num * sizeof (struct update_cost_queue_elem);
1238 update_cost_queue_elems
1239 = (struct update_cost_queue_elem *) ira_allocate (size);
1240 memset (update_cost_queue_elems, 0, size);
058e97ec 1241 update_cost_check = 0;
3b6d1699 1242 init_update_cost_records ();
058e97ec
VM
1243}
1244
3b6d1699 1245/* Deallocate data used by function update_costs_from_copies. */
058e97ec
VM
1246static void
1247finish_cost_update (void)
1248{
0eeb2240 1249 ira_free (update_cost_queue_elems);
3b6d1699 1250 finish_update_cost_records ();
058e97ec
VM
1251}
1252
a7f32992
VM
1253/* When we traverse allocnos to update hard register costs, the cost
1254 divisor will be multiplied by the following macro value for each
1255 hop from given allocno to directly connected allocnos. */
1256#define COST_HOP_DIVISOR 4
1257
f754734f 1258/* Start a new cost-updating pass. */
058e97ec 1259static void
f754734f 1260start_update_cost (void)
058e97ec 1261{
f754734f
RS
1262 update_cost_check++;
1263 update_cost_queue = NULL;
1264}
058e97ec 1265
3b6d1699 1266/* Add (ALLOCNO, FROM, DIVISOR) to the end of update_cost_queue, unless
1756cb66 1267 ALLOCNO is already in the queue, or has NO_REGS class. */
f754734f 1268static inline void
3b6d1699 1269queue_update_cost (ira_allocno_t allocno, ira_allocno_t from, int divisor)
f754734f
RS
1270{
1271 struct update_cost_queue_elem *elem;
1272
1273 elem = &update_cost_queue_elems[ALLOCNO_NUM (allocno)];
1274 if (elem->check != update_cost_check
1756cb66 1275 && ALLOCNO_CLASS (allocno) != NO_REGS)
058e97ec 1276 {
f754734f 1277 elem->check = update_cost_check;
3b6d1699 1278 elem->from = from;
f754734f
RS
1279 elem->divisor = divisor;
1280 elem->next = NULL;
1281 if (update_cost_queue == NULL)
1282 update_cost_queue = allocno;
058e97ec 1283 else
f754734f
RS
1284 update_cost_queue_tail->next = allocno;
1285 update_cost_queue_tail = elem;
058e97ec
VM
1286 }
1287}
1288
3b6d1699
VM
1289/* Try to remove the first element from update_cost_queue. Return
1290 false if the queue was empty, otherwise make (*ALLOCNO, *FROM,
1291 *DIVISOR) describe the removed element. */
f754734f 1292static inline bool
3b6d1699 1293get_next_update_cost (ira_allocno_t *allocno, ira_allocno_t *from, int *divisor)
058e97ec 1294{
f754734f
RS
1295 struct update_cost_queue_elem *elem;
1296
1297 if (update_cost_queue == NULL)
1298 return false;
1299
1300 *allocno = update_cost_queue;
1301 elem = &update_cost_queue_elems[ALLOCNO_NUM (*allocno)];
3b6d1699 1302 *from = elem->from;
f754734f
RS
1303 *divisor = elem->divisor;
1304 update_cost_queue = elem->next;
1305 return true;
058e97ec
VM
1306}
1307
3b6d1699
VM
1308/* Increase costs of HARD_REGNO by UPDATE_COST for ALLOCNO. Return
1309 true if we really modified the cost. */
1310static bool
1311update_allocno_cost (ira_allocno_t allocno, int hard_regno, int update_cost)
1312{
1313 int i;
1314 enum reg_class aclass = ALLOCNO_CLASS (allocno);
1315
1316 i = ira_class_hard_reg_index[aclass][hard_regno];
1317 if (i < 0)
1318 return false;
1319 ira_allocate_and_set_or_copy_costs
1320 (&ALLOCNO_UPDATED_HARD_REG_COSTS (allocno), aclass,
1321 ALLOCNO_UPDATED_CLASS_COST (allocno),
1322 ALLOCNO_HARD_REG_COSTS (allocno));
1323 ira_allocate_and_set_or_copy_costs
1324 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno),
1325 aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (allocno));
1326 ALLOCNO_UPDATED_HARD_REG_COSTS (allocno)[i] += update_cost;
1327 ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno)[i] += update_cost;
1328 return true;
1329}
1330
1331/* Update (decrease if DECR_P) HARD_REGNO cost of allocnos connected
1332 by copies to ALLOCNO to increase chances to remove some copies as
1333 the result of subsequent assignment. Record cost updates if
1334 RECORD_P is true. */
a7f32992 1335static void
3b6d1699
VM
1336update_costs_from_allocno (ira_allocno_t allocno, int hard_regno,
1337 int divisor, bool decr_p, bool record_p)
a7f32992 1338{
3b6d1699 1339 int cost, update_cost;
a7f32992 1340 enum machine_mode mode;
1756cb66 1341 enum reg_class rclass, aclass;
3b6d1699 1342 ira_allocno_t another_allocno, from = NULL;
a7f32992
VM
1343 ira_copy_t cp, next_cp;
1344
f754734f 1345 rclass = REGNO_REG_CLASS (hard_regno);
f754734f 1346 do
a7f32992 1347 {
f754734f 1348 mode = ALLOCNO_MODE (allocno);
1756cb66 1349 ira_init_register_move_cost_if_necessary (mode);
f754734f 1350 for (cp = ALLOCNO_COPIES (allocno); cp != NULL; cp = next_cp)
a7f32992 1351 {
f754734f 1352 if (cp->first == allocno)
a7f32992 1353 {
f754734f
RS
1354 next_cp = cp->next_first_allocno_copy;
1355 another_allocno = cp->second;
1356 }
1357 else if (cp->second == allocno)
1358 {
1359 next_cp = cp->next_second_allocno_copy;
1360 another_allocno = cp->first;
a7f32992 1361 }
f754734f
RS
1362 else
1363 gcc_unreachable ();
1364
3b6d1699
VM
1365 if (another_allocno == from)
1366 continue;
1367
1756cb66
VM
1368 aclass = ALLOCNO_CLASS (another_allocno);
1369 if (! TEST_HARD_REG_BIT (reg_class_contents[aclass],
6042d1dd 1370 hard_regno)
f754734f
RS
1371 || ALLOCNO_ASSIGNED_P (another_allocno))
1372 continue;
1373
1374 cost = (cp->second == allocno
1756cb66
VM
1375 ? ira_register_move_cost[mode][rclass][aclass]
1376 : ira_register_move_cost[mode][aclass][rclass]);
f754734f
RS
1377 if (decr_p)
1378 cost = -cost;
1379
1380 update_cost = cp->freq * cost / divisor;
1381 if (update_cost == 0)
1382 continue;
1383
3b6d1699 1384 if (! update_allocno_cost (another_allocno, hard_regno, update_cost))
1756cb66 1385 continue;
3b6d1699
VM
1386 queue_update_cost (another_allocno, allocno, divisor * COST_HOP_DIVISOR);
1387 if (record_p && ALLOCNO_COLOR_DATA (another_allocno) != NULL)
1388 ALLOCNO_COLOR_DATA (another_allocno)->update_cost_records
1389 = get_update_cost_record (hard_regno, divisor,
1390 ALLOCNO_COLOR_DATA (another_allocno)
1391 ->update_cost_records);
a7f32992 1392 }
a7f32992 1393 }
3b6d1699
VM
1394 while (get_next_update_cost (&allocno, &from, &divisor));
1395}
1396
1397/* Decrease preferred ALLOCNO hard register costs and costs of
1398 allocnos connected to ALLOCNO through copy. */
1399static void
1400update_costs_from_prefs (ira_allocno_t allocno)
1401{
1402 ira_pref_t pref;
1403
1404 start_update_cost ();
1405 for (pref = ALLOCNO_PREFS (allocno); pref != NULL; pref = pref->next_pref)
1406 update_costs_from_allocno (allocno, pref->hard_regno,
1407 COST_HOP_DIVISOR, true, true);
1408}
1409
1410/* Update (decrease if DECR_P) the cost of allocnos connected to
1411 ALLOCNO through copies to increase chances to remove some copies as
1412 the result of subsequent assignment. ALLOCNO was just assigned to
c73ccc80 1413 a hard register. Record cost updates if RECORD_P is true. */
3b6d1699 1414static void
c73ccc80 1415update_costs_from_copies (ira_allocno_t allocno, bool decr_p, bool record_p)
3b6d1699
VM
1416{
1417 int hard_regno;
1418
1419 hard_regno = ALLOCNO_HARD_REGNO (allocno);
1420 ira_assert (hard_regno >= 0 && ALLOCNO_CLASS (allocno) != NO_REGS);
1421 start_update_cost ();
c73ccc80 1422 update_costs_from_allocno (allocno, hard_regno, 1, decr_p, record_p);
3b6d1699
VM
1423}
1424
1425/* Restore costs of allocnos connected to ALLOCNO by copies as it was
1426 before updating costs of these allocnos from given allocno. This
1427 is a wise thing to do as if given allocno did not get an expected
1428 hard reg, using smaller cost of the hard reg for allocnos connected
1429 by copies to given allocno becomes actually misleading. Free all
1430 update cost records for ALLOCNO as we don't need them anymore. */
1431static void
1432restore_costs_from_copies (ira_allocno_t allocno)
1433{
1434 struct update_cost_record *records, *curr;
1435
1436 if (ALLOCNO_COLOR_DATA (allocno) == NULL)
1437 return;
1438 records = ALLOCNO_COLOR_DATA (allocno)->update_cost_records;
1439 start_update_cost ();
1440 for (curr = records; curr != NULL; curr = curr->next)
1441 update_costs_from_allocno (allocno, curr->hard_regno,
1442 curr->divisor, true, false);
1443 free_update_cost_record_list (records);
1444 ALLOCNO_COLOR_DATA (allocno)->update_cost_records = NULL;
f754734f
RS
1445}
1446
7db7ed3c 1447/* This function updates COSTS (decrease if DECR_P) for hard_registers
1756cb66 1448 of ACLASS by conflict costs of the unassigned allocnos
7db7ed3c
VM
1449 connected by copies with allocnos in update_cost_queue. This
1450 update increases chances to remove some copies. */
f754734f 1451static void
1756cb66 1452update_conflict_hard_regno_costs (int *costs, enum reg_class aclass,
7db7ed3c 1453 bool decr_p)
f754734f
RS
1454{
1455 int i, cost, class_size, freq, mult, div, divisor;
7db7ed3c 1456 int index, hard_regno;
f754734f
RS
1457 int *conflict_costs;
1458 bool cont_p;
1756cb66 1459 enum reg_class another_aclass;
3b6d1699 1460 ira_allocno_t allocno, another_allocno, from;
f754734f
RS
1461 ira_copy_t cp, next_cp;
1462
3b6d1699 1463 while (get_next_update_cost (&allocno, &from, &divisor))
f754734f
RS
1464 for (cp = ALLOCNO_COPIES (allocno); cp != NULL; cp = next_cp)
1465 {
1466 if (cp->first == allocno)
1467 {
1468 next_cp = cp->next_first_allocno_copy;
1469 another_allocno = cp->second;
1470 }
1471 else if (cp->second == allocno)
1472 {
1473 next_cp = cp->next_second_allocno_copy;
1474 another_allocno = cp->first;
1475 }
1476 else
1477 gcc_unreachable ();
3b6d1699
VM
1478
1479 if (another_allocno == from)
1480 continue;
1481
1756cb66
VM
1482 another_aclass = ALLOCNO_CLASS (another_allocno);
1483 if (! ira_reg_classes_intersect_p[aclass][another_aclass]
f754734f 1484 || ALLOCNO_ASSIGNED_P (another_allocno)
1756cb66 1485 || ALLOCNO_COLOR_DATA (another_allocno)->may_be_spilled_p)
f754734f 1486 continue;
1756cb66 1487 class_size = ira_class_hard_regs_num[another_aclass];
f754734f
RS
1488 ira_allocate_and_copy_costs
1489 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (another_allocno),
1756cb66 1490 another_aclass, ALLOCNO_CONFLICT_HARD_REG_COSTS (another_allocno));
f754734f
RS
1491 conflict_costs
1492 = ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (another_allocno);
1493 if (conflict_costs == NULL)
1494 cont_p = true;
1495 else
1496 {
1497 mult = cp->freq;
1498 freq = ALLOCNO_FREQ (another_allocno);
1499 if (freq == 0)
1500 freq = 1;
1501 div = freq * divisor;
1502 cont_p = false;
1503 for (i = class_size - 1; i >= 0; i--)
1504 {
1756cb66 1505 hard_regno = ira_class_hard_regs[another_aclass][i];
7db7ed3c 1506 ira_assert (hard_regno >= 0);
1756cb66 1507 index = ira_class_hard_reg_index[aclass][hard_regno];
7db7ed3c
VM
1508 if (index < 0)
1509 continue;
6686e0bc 1510 cost = (int) ((unsigned) conflict_costs [i] * mult) / div;
f754734f
RS
1511 if (cost == 0)
1512 continue;
1513 cont_p = true;
1514 if (decr_p)
1515 cost = -cost;
7db7ed3c 1516 costs[index] += cost;
f754734f
RS
1517 }
1518 }
1519 /* Probably 5 hops will be enough. */
1520 if (cont_p
1521 && divisor <= (COST_HOP_DIVISOR
1522 * COST_HOP_DIVISOR
1523 * COST_HOP_DIVISOR
1524 * COST_HOP_DIVISOR))
3b6d1699 1525 queue_update_cost (another_allocno, allocno, divisor * COST_HOP_DIVISOR);
f754734f 1526 }
a7f32992
VM
1527}
1528
27508f5f
VM
1529/* Set up conflicting (through CONFLICT_REGS) for each object of
1530 allocno A and the start allocno profitable regs (through
1531 START_PROFITABLE_REGS). Remember that the start profitable regs
1532 exclude hard regs which can not hold value of mode of allocno A.
1533 This covers mostly cases when multi-register value should be
1534 aligned. */
1756cb66 1535static inline void
27508f5f
VM
1536get_conflict_and_start_profitable_regs (ira_allocno_t a, bool retry_p,
1537 HARD_REG_SET *conflict_regs,
1538 HARD_REG_SET *start_profitable_regs)
1756cb66
VM
1539{
1540 int i, nwords;
1541 ira_object_t obj;
1542
1543 nwords = ALLOCNO_NUM_OBJECTS (a);
1544 for (i = 0; i < nwords; i++)
1545 {
1546 obj = ALLOCNO_OBJECT (a, i);
1547 COPY_HARD_REG_SET (conflict_regs[i],
1548 OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
1756cb66 1549 }
27508f5f
VM
1550 if (retry_p)
1551 {
1552 COPY_HARD_REG_SET (*start_profitable_regs,
1553 reg_class_contents[ALLOCNO_CLASS (a)]);
1554 AND_COMPL_HARD_REG_SET (*start_profitable_regs,
1555 ira_prohibited_class_mode_regs
1556 [ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]);
1557 }
1558 else
1559 COPY_HARD_REG_SET (*start_profitable_regs,
1560 ALLOCNO_COLOR_DATA (a)->profitable_hard_regs);
1756cb66
VM
1561}
1562
27508f5f
VM
1563/* Return true if HARD_REGNO is ok for assigning to allocno A with
1564 PROFITABLE_REGS and whose objects have CONFLICT_REGS. */
1756cb66
VM
1565static inline bool
1566check_hard_reg_p (ira_allocno_t a, int hard_regno,
27508f5f 1567 HARD_REG_SET *conflict_regs, HARD_REG_SET profitable_regs)
1756cb66
VM
1568{
1569 int j, nwords, nregs;
8d189b3f
VM
1570 enum reg_class aclass;
1571 enum machine_mode mode;
1756cb66 1572
8d189b3f
VM
1573 aclass = ALLOCNO_CLASS (a);
1574 mode = ALLOCNO_MODE (a);
1575 if (TEST_HARD_REG_BIT (ira_prohibited_class_mode_regs[aclass][mode],
1576 hard_regno))
1577 return false;
27508f5f
VM
1578 /* Checking only profitable hard regs. */
1579 if (! TEST_HARD_REG_BIT (profitable_regs, hard_regno))
1580 return false;
8d189b3f 1581 nregs = hard_regno_nregs[hard_regno][mode];
1756cb66
VM
1582 nwords = ALLOCNO_NUM_OBJECTS (a);
1583 for (j = 0; j < nregs; j++)
1584 {
1585 int k;
1586 int set_to_test_start = 0, set_to_test_end = nwords;
1587
1588 if (nregs == nwords)
1589 {
2805e6c0 1590 if (REG_WORDS_BIG_ENDIAN)
1756cb66
VM
1591 set_to_test_start = nwords - j - 1;
1592 else
1593 set_to_test_start = j;
1594 set_to_test_end = set_to_test_start + 1;
1595 }
1596 for (k = set_to_test_start; k < set_to_test_end; k++)
27508f5f 1597 if (TEST_HARD_REG_BIT (conflict_regs[k], hard_regno + j))
1756cb66
VM
1598 break;
1599 if (k != set_to_test_end)
1600 break;
1601 }
1602 return j == nregs;
1603}
9181a6e5
VM
1604
1605/* Return number of registers needed to be saved and restored at
1606 function prologue/epilogue if we allocate HARD_REGNO to hold value
1607 of MODE. */
1608static int
1609calculate_saved_nregs (int hard_regno, enum machine_mode mode)
1610{
1611 int i;
1612 int nregs = 0;
1613
1614 ira_assert (hard_regno >= 0);
1615 for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
1616 if (!allocated_hardreg_p[hard_regno + i]
1617 && !TEST_HARD_REG_BIT (call_used_reg_set, hard_regno + i)
1618 && !LOCAL_REGNO (hard_regno + i))
1619 nregs++;
1620 return nregs;
1621}
1756cb66 1622
22b0982c
VM
1623/* Choose a hard register for allocno A. If RETRY_P is TRUE, it means
1624 that the function called from function
1756cb66
VM
1625 `ira_reassign_conflict_allocnos' and `allocno_reload_assign'. In
1626 this case some allocno data are not defined or updated and we
1627 should not touch these data. The function returns true if we
1628 managed to assign a hard register to the allocno.
1629
1630 To assign a hard register, first of all we calculate all conflict
1631 hard registers which can come from conflicting allocnos with
1632 already assigned hard registers. After that we find first free
1633 hard register with the minimal cost. During hard register cost
1634 calculation we take conflict hard register costs into account to
1635 give a chance for conflicting allocnos to get a better hard
1636 register in the future.
1637
1638 If the best hard register cost is bigger than cost of memory usage
1639 for the allocno, we don't assign a hard register to given allocno
1640 at all.
1641
1642 If we assign a hard register to the allocno, we update costs of the
1643 hard register for allocnos connected by copies to improve a chance
1644 to coalesce insns represented by the copies when we assign hard
1645 registers to the allocnos connected by the copies. */
058e97ec 1646static bool
22b0982c 1647assign_hard_reg (ira_allocno_t a, bool retry_p)
058e97ec 1648{
27508f5f 1649 HARD_REG_SET conflicting_regs[2], profitable_hard_regs;
fbddb81d 1650 int i, j, hard_regno, best_hard_regno, class_size;
22b0982c 1651 int cost, mem_cost, min_cost, full_cost, min_full_cost, nwords, word;
058e97ec 1652 int *a_costs;
1756cb66 1653 enum reg_class aclass;
058e97ec 1654 enum machine_mode mode;
058e97ec 1655 static int costs[FIRST_PSEUDO_REGISTER], full_costs[FIRST_PSEUDO_REGISTER];
fbddb81d 1656 int saved_nregs;
a5c011cd
MP
1657 enum reg_class rclass;
1658 int add_cost;
058e97ec
VM
1659#ifdef STACK_REGS
1660 bool no_stack_reg_p;
1661#endif
1662
22b0982c 1663 ira_assert (! ALLOCNO_ASSIGNED_P (a));
27508f5f
VM
1664 get_conflict_and_start_profitable_regs (a, retry_p,
1665 conflicting_regs,
1666 &profitable_hard_regs);
1756cb66
VM
1667 aclass = ALLOCNO_CLASS (a);
1668 class_size = ira_class_hard_regs_num[aclass];
058e97ec
VM
1669 best_hard_regno = -1;
1670 memset (full_costs, 0, sizeof (int) * class_size);
1671 mem_cost = 0;
058e97ec
VM
1672 memset (costs, 0, sizeof (int) * class_size);
1673 memset (full_costs, 0, sizeof (int) * class_size);
1674#ifdef STACK_REGS
1675 no_stack_reg_p = false;
1676#endif
1756cb66
VM
1677 if (! retry_p)
1678 start_update_cost ();
22b0982c
VM
1679 mem_cost += ALLOCNO_UPDATED_MEMORY_COST (a);
1680
1681 ira_allocate_and_copy_costs (&ALLOCNO_UPDATED_HARD_REG_COSTS (a),
1756cb66 1682 aclass, ALLOCNO_HARD_REG_COSTS (a));
22b0982c 1683 a_costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a);
058e97ec 1684#ifdef STACK_REGS
22b0982c 1685 no_stack_reg_p = no_stack_reg_p || ALLOCNO_TOTAL_NO_STACK_REG_P (a);
058e97ec 1686#endif
1756cb66 1687 cost = ALLOCNO_UPDATED_CLASS_COST (a);
22b0982c
VM
1688 for (i = 0; i < class_size; i++)
1689 if (a_costs != NULL)
1690 {
1691 costs[i] += a_costs[i];
1692 full_costs[i] += a_costs[i];
1693 }
1694 else
1695 {
1696 costs[i] += cost;
1697 full_costs[i] += cost;
1698 }
1756cb66 1699 nwords = ALLOCNO_NUM_OBJECTS (a);
27508f5f 1700 curr_allocno_process++;
22b0982c
VM
1701 for (word = 0; word < nwords; word++)
1702 {
1703 ira_object_t conflict_obj;
1704 ira_object_t obj = ALLOCNO_OBJECT (a, word);
1705 ira_object_conflict_iterator oci;
1706
22b0982c
VM
1707 /* Take preferences of conflicting allocnos into account. */
1708 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
1756cb66 1709 {
22b0982c 1710 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
1756cb66
VM
1711 enum reg_class conflict_aclass;
1712
22b0982c
VM
1713 /* Reload can give another class so we need to check all
1714 allocnos. */
1756cb66
VM
1715 if (!retry_p
1716 && (!bitmap_bit_p (consideration_allocno_bitmap,
1717 ALLOCNO_NUM (conflict_a))
1718 || ((!ALLOCNO_ASSIGNED_P (conflict_a)
1719 || ALLOCNO_HARD_REGNO (conflict_a) < 0)
1720 && !(hard_reg_set_intersect_p
27508f5f
VM
1721 (profitable_hard_regs,
1722 ALLOCNO_COLOR_DATA
1723 (conflict_a)->profitable_hard_regs)))))
22b0982c 1724 continue;
1756cb66 1725 conflict_aclass = ALLOCNO_CLASS (conflict_a);
22b0982c 1726 ira_assert (ira_reg_classes_intersect_p
1756cb66 1727 [aclass][conflict_aclass]);
22b0982c 1728 if (ALLOCNO_ASSIGNED_P (conflict_a))
fa86d337 1729 {
22b0982c
VM
1730 hard_regno = ALLOCNO_HARD_REGNO (conflict_a);
1731 if (hard_regno >= 0
b8faca75
VM
1732 && (ira_hard_reg_set_intersection_p
1733 (hard_regno, ALLOCNO_MODE (conflict_a),
1734 reg_class_contents[aclass])))
fa86d337 1735 {
22b0982c 1736 int n_objects = ALLOCNO_NUM_OBJECTS (conflict_a);
4648deb4 1737 int conflict_nregs;
1756cb66 1738
4648deb4
VM
1739 mode = ALLOCNO_MODE (conflict_a);
1740 conflict_nregs = hard_regno_nregs[hard_regno][mode];
22b0982c 1741 if (conflict_nregs == n_objects && conflict_nregs > 1)
fa86d337 1742 {
22b0982c 1743 int num = OBJECT_SUBWORD (conflict_obj);
ac0ab4f7 1744
2805e6c0 1745 if (REG_WORDS_BIG_ENDIAN)
22b0982c
VM
1746 SET_HARD_REG_BIT (conflicting_regs[word],
1747 hard_regno + n_objects - num - 1);
1748 else
1749 SET_HARD_REG_BIT (conflicting_regs[word],
1750 hard_regno + num);
ac0ab4f7 1751 }
22b0982c
VM
1752 else
1753 IOR_HARD_REG_SET
1754 (conflicting_regs[word],
1755 ira_reg_mode_hard_regset[hard_regno][mode]);
27508f5f 1756 if (hard_reg_set_subset_p (profitable_hard_regs,
22b0982c
VM
1757 conflicting_regs[word]))
1758 goto fail;
fa86d337
BS
1759 }
1760 }
1756cb66 1761 else if (! retry_p
27508f5f
VM
1762 && ! ALLOCNO_COLOR_DATA (conflict_a)->may_be_spilled_p
1763 /* Don't process the conflict allocno twice. */
1764 && (ALLOCNO_COLOR_DATA (conflict_a)->last_process
1765 != curr_allocno_process))
22b0982c
VM
1766 {
1767 int k, *conflict_costs;
1768
27508f5f
VM
1769 ALLOCNO_COLOR_DATA (conflict_a)->last_process
1770 = curr_allocno_process;
22b0982c
VM
1771 ira_allocate_and_copy_costs
1772 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (conflict_a),
1756cb66 1773 conflict_aclass,
22b0982c
VM
1774 ALLOCNO_CONFLICT_HARD_REG_COSTS (conflict_a));
1775 conflict_costs
1776 = ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (conflict_a);
1777 if (conflict_costs != NULL)
1778 for (j = class_size - 1; j >= 0; j--)
1779 {
1756cb66 1780 hard_regno = ira_class_hard_regs[aclass][j];
22b0982c 1781 ira_assert (hard_regno >= 0);
1756cb66 1782 k = ira_class_hard_reg_index[conflict_aclass][hard_regno];
22b0982c
VM
1783 if (k < 0)
1784 continue;
1785 full_costs[j] -= conflict_costs[k];
1786 }
3b6d1699
VM
1787 queue_update_cost (conflict_a, NULL, COST_HOP_DIVISOR);
1788
22b0982c 1789 }
fa86d337 1790 }
058e97ec 1791 }
1756cb66
VM
1792 if (! retry_p)
1793 /* Take into account preferences of allocnos connected by copies to
1794 the conflict allocnos. */
1795 update_conflict_hard_regno_costs (full_costs, aclass, true);
f754734f 1796
a7f32992
VM
1797 /* Take preferences of allocnos connected by copies into
1798 account. */
1756cb66
VM
1799 if (! retry_p)
1800 {
1801 start_update_cost ();
3b6d1699 1802 queue_update_cost (a, NULL, COST_HOP_DIVISOR);
1756cb66
VM
1803 update_conflict_hard_regno_costs (full_costs, aclass, false);
1804 }
058e97ec
VM
1805 min_cost = min_full_cost = INT_MAX;
1806 /* We don't care about giving callee saved registers to allocnos no
1807 living through calls because call clobbered registers are
1808 allocated first (it is usual practice to put them first in
1809 REG_ALLOC_ORDER). */
1756cb66 1810 mode = ALLOCNO_MODE (a);
058e97ec
VM
1811 for (i = 0; i < class_size; i++)
1812 {
1756cb66 1813 hard_regno = ira_class_hard_regs[aclass][i];
058e97ec
VM
1814#ifdef STACK_REGS
1815 if (no_stack_reg_p
1816 && FIRST_STACK_REG <= hard_regno && hard_regno <= LAST_STACK_REG)
1817 continue;
1818#endif
1756cb66
VM
1819 if (! check_hard_reg_p (a, hard_regno,
1820 conflicting_regs, profitable_hard_regs))
058e97ec
VM
1821 continue;
1822 cost = costs[i];
1823 full_cost = full_costs[i];
ed15c598 1824 if (!HONOR_REG_ALLOC_ORDER)
058e97ec 1825 {
ed15c598
KC
1826 if ((saved_nregs = calculate_saved_nregs (hard_regno, mode)) != 0)
1827 /* We need to save/restore the hard register in
1828 epilogue/prologue. Therefore we increase the cost. */
1829 {
1830 rclass = REGNO_REG_CLASS (hard_regno);
1831 add_cost = ((ira_memory_move_cost[mode][rclass][0]
1832 + ira_memory_move_cost[mode][rclass][1])
1833 * saved_nregs / hard_regno_nregs[hard_regno][mode] - 1);
1834 cost += add_cost;
1835 full_cost += add_cost;
1836 }
058e97ec
VM
1837 }
1838 if (min_cost > cost)
1839 min_cost = cost;
1840 if (min_full_cost > full_cost)
1841 {
1842 min_full_cost = full_cost;
1843 best_hard_regno = hard_regno;
1844 ira_assert (hard_regno >= 0);
1845 }
1846 }
1847 if (min_full_cost > mem_cost)
1848 {
1849 if (! retry_p && internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
1850 fprintf (ira_dump_file, "(memory is more profitable %d vs %d) ",
1851 mem_cost, min_full_cost);
1852 best_hard_regno = -1;
1853 }
1854 fail:
058e97ec 1855 if (best_hard_regno >= 0)
9181a6e5
VM
1856 {
1857 for (i = hard_regno_nregs[best_hard_regno][mode] - 1; i >= 0; i--)
34672f15 1858 allocated_hardreg_p[best_hard_regno + i] = true;
9181a6e5 1859 }
c73ccc80
VM
1860 if (! retry_p)
1861 restore_costs_from_copies (a);
22b0982c
VM
1862 ALLOCNO_HARD_REGNO (a) = best_hard_regno;
1863 ALLOCNO_ASSIGNED_P (a) = true;
1864 if (best_hard_regno >= 0)
c73ccc80 1865 update_costs_from_copies (a, true, ! retry_p);
1756cb66 1866 ira_assert (ALLOCNO_CLASS (a) == aclass);
22b0982c
VM
1867 /* We don't need updated costs anymore: */
1868 ira_free_allocno_updated_costs (a);
058e97ec
VM
1869 return best_hard_regno >= 0;
1870}
1871
1872\f
1873
bf08fb16
VM
1874/* An array used to sort copies. */
1875static ira_copy_t *sorted_copies;
1876
1877/* Return TRUE if live ranges of allocnos A1 and A2 intersect. It is
1878 used to find a conflict for new allocnos or allocnos with the
1879 different allocno classes. */
1880static bool
1881allocnos_conflict_by_live_ranges_p (ira_allocno_t a1, ira_allocno_t a2)
1882{
1883 rtx reg1, reg2;
1884 int i, j;
1885 int n1 = ALLOCNO_NUM_OBJECTS (a1);
1886 int n2 = ALLOCNO_NUM_OBJECTS (a2);
1887
1888 if (a1 == a2)
1889 return false;
1890 reg1 = regno_reg_rtx[ALLOCNO_REGNO (a1)];
1891 reg2 = regno_reg_rtx[ALLOCNO_REGNO (a2)];
1892 if (reg1 != NULL && reg2 != NULL
1893 && ORIGINAL_REGNO (reg1) == ORIGINAL_REGNO (reg2))
1894 return false;
1895
1896 for (i = 0; i < n1; i++)
1897 {
1898 ira_object_t c1 = ALLOCNO_OBJECT (a1, i);
1899
1900 for (j = 0; j < n2; j++)
1901 {
1902 ira_object_t c2 = ALLOCNO_OBJECT (a2, j);
1903
1904 if (ira_live_ranges_intersect_p (OBJECT_LIVE_RANGES (c1),
1905 OBJECT_LIVE_RANGES (c2)))
1906 return true;
1907 }
1908 }
1909 return false;
1910}
1911
1912/* The function is used to sort copies according to their execution
1913 frequencies. */
1914static int
1915copy_freq_compare_func (const void *v1p, const void *v2p)
1916{
1917 ira_copy_t cp1 = *(const ira_copy_t *) v1p, cp2 = *(const ira_copy_t *) v2p;
1918 int pri1, pri2;
1919
1920 pri1 = cp1->freq;
1921 pri2 = cp2->freq;
1922 if (pri2 - pri1)
1923 return pri2 - pri1;
1924
1925 /* If freqencies are equal, sort by copies, so that the results of
1926 qsort leave nothing to chance. */
1927 return cp1->num - cp2->num;
1928}
1929
1930\f
1931
1932/* Return true if any allocno from thread of A1 conflicts with any
1933 allocno from thread A2. */
1934static bool
1935allocno_thread_conflict_p (ira_allocno_t a1, ira_allocno_t a2)
1936{
1937 ira_allocno_t a, conflict_a;
1938
1939 for (a = ALLOCNO_COLOR_DATA (a2)->next_thread_allocno;;
1940 a = ALLOCNO_COLOR_DATA (a)->next_thread_allocno)
1941 {
1942 for (conflict_a = ALLOCNO_COLOR_DATA (a1)->next_thread_allocno;;
1943 conflict_a = ALLOCNO_COLOR_DATA (conflict_a)->next_thread_allocno)
1944 {
1945 if (allocnos_conflict_by_live_ranges_p (a, conflict_a))
1946 return true;
1947 if (conflict_a == a1)
1948 break;
1949 }
1950 if (a == a2)
1951 break;
1952 }
1953 return false;
1954}
1955
1956/* Merge two threads given correspondingly by their first allocnos T1
1957 and T2 (more accurately merging T2 into T1). */
1958static void
1959merge_threads (ira_allocno_t t1, ira_allocno_t t2)
1960{
1961 ira_allocno_t a, next, last;
1962
1963 gcc_assert (t1 != t2
1964 && ALLOCNO_COLOR_DATA (t1)->first_thread_allocno == t1
1965 && ALLOCNO_COLOR_DATA (t2)->first_thread_allocno == t2);
1966 for (last = t2, a = ALLOCNO_COLOR_DATA (t2)->next_thread_allocno;;
1967 a = ALLOCNO_COLOR_DATA (a)->next_thread_allocno)
1968 {
1969 ALLOCNO_COLOR_DATA (a)->first_thread_allocno = t1;
1970 if (a == t2)
1971 break;
1972 last = a;
1973 }
1974 next = ALLOCNO_COLOR_DATA (t1)->next_thread_allocno;
1975 ALLOCNO_COLOR_DATA (t1)->next_thread_allocno = t2;
1976 ALLOCNO_COLOR_DATA (last)->next_thread_allocno = next;
1977 ALLOCNO_COLOR_DATA (t1)->thread_freq += ALLOCNO_COLOR_DATA (t2)->thread_freq;
1978}
1979
1980/* Create threads by processing CP_NUM copies from sorted)ciopeis. We
1981 process the most expensive copies first. */
1982static void
1983form_threads_from_copies (int cp_num)
1984{
1985 ira_allocno_t a, thread1, thread2;
1986 ira_copy_t cp;
1987 int i, n;
1988
1989 qsort (sorted_copies, cp_num, sizeof (ira_copy_t), copy_freq_compare_func);
1990 /* Form threads processing copies, most frequently executed
1991 first. */
1992 for (; cp_num != 0;)
1993 {
1994 for (i = 0; i < cp_num; i++)
1995 {
1996 cp = sorted_copies[i];
1997 thread1 = ALLOCNO_COLOR_DATA (cp->first)->first_thread_allocno;
1998 thread2 = ALLOCNO_COLOR_DATA (cp->second)->first_thread_allocno;
1999 if (thread1 == thread2)
2000 continue;
2001 if (! allocno_thread_conflict_p (thread1, thread2))
2002 {
2003 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2004 fprintf
2005 (ira_dump_file,
2006 " Forming thread by copy %d:a%dr%d-a%dr%d (freq=%d):\n",
2007 cp->num, ALLOCNO_NUM (cp->first), ALLOCNO_REGNO (cp->first),
2008 ALLOCNO_NUM (cp->second), ALLOCNO_REGNO (cp->second),
2009 cp->freq);
2010 merge_threads (thread1, thread2);
2011 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2012 {
2013 thread1 = ALLOCNO_COLOR_DATA (thread1)->first_thread_allocno;
2014 fprintf (ira_dump_file, " Result (freq=%d): a%dr%d(%d)",
2015 ALLOCNO_COLOR_DATA (thread1)->thread_freq,
2016 ALLOCNO_NUM (thread1), ALLOCNO_REGNO (thread1),
2017 ALLOCNO_FREQ (thread1));
2018 for (a = ALLOCNO_COLOR_DATA (thread1)->next_thread_allocno;
2019 a != thread1;
2020 a = ALLOCNO_COLOR_DATA (a)->next_thread_allocno)
2021 fprintf (ira_dump_file, " a%dr%d(%d)",
2022 ALLOCNO_NUM (a), ALLOCNO_REGNO (a),
2023 ALLOCNO_FREQ (a));
2024 fprintf (ira_dump_file, "\n");
2025 }
2026 i++;
2027 break;
2028 }
2029 }
2030 /* Collect the rest of copies. */
2031 for (n = 0; i < cp_num; i++)
2032 {
2033 cp = sorted_copies[i];
2034 if (ALLOCNO_COLOR_DATA (cp->first)->first_thread_allocno
2035 != ALLOCNO_COLOR_DATA (cp->second)->first_thread_allocno)
2036 sorted_copies[n++] = cp;
2037 }
2038 cp_num = n;
2039 }
2040}
2041
2042/* Create threads by processing copies of all alocnos from BUCKET. We
2043 process the most expensive copies first. */
2044static void
2045form_threads_from_bucket (ira_allocno_t bucket)
2046{
2047 ira_allocno_t a;
2048 ira_copy_t cp, next_cp;
2049 int cp_num = 0;
2050
2051 for (a = bucket; a != NULL; a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno)
2052 {
2053 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
2054 {
2055 if (cp->first == a)
2056 {
2057 next_cp = cp->next_first_allocno_copy;
2058 sorted_copies[cp_num++] = cp;
2059 }
2060 else if (cp->second == a)
2061 next_cp = cp->next_second_allocno_copy;
2062 else
2063 gcc_unreachable ();
2064 }
2065 }
2066 form_threads_from_copies (cp_num);
2067}
2068
2069/* Create threads by processing copies of colorable allocno A. We
2070 process most expensive copies first. */
2071static void
2072form_threads_from_colorable_allocno (ira_allocno_t a)
2073{
2074 ira_allocno_t another_a;
2075 ira_copy_t cp, next_cp;
2076 int cp_num = 0;
2077
2078 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
2079 {
2080 if (cp->first == a)
2081 {
2082 next_cp = cp->next_first_allocno_copy;
2083 another_a = cp->second;
2084 }
2085 else if (cp->second == a)
2086 {
2087 next_cp = cp->next_second_allocno_copy;
2088 another_a = cp->first;
2089 }
2090 else
2091 gcc_unreachable ();
2092 if ((! ALLOCNO_COLOR_DATA (another_a)->in_graph_p
2093 && !ALLOCNO_COLOR_DATA (another_a)->may_be_spilled_p)
2094 || ALLOCNO_COLOR_DATA (another_a)->colorable_p)
2095 sorted_copies[cp_num++] = cp;
2096 }
2097 form_threads_from_copies (cp_num);
2098}
2099
2100/* Form initial threads which contain only one allocno. */
2101static void
2102init_allocno_threads (void)
2103{
2104 ira_allocno_t a;
2105 unsigned int j;
2106 bitmap_iterator bi;
2107
2108 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
2109 {
2110 a = ira_allocnos[j];
2111 /* Set up initial thread data: */
2112 ALLOCNO_COLOR_DATA (a)->first_thread_allocno
2113 = ALLOCNO_COLOR_DATA (a)->next_thread_allocno = a;
2114 ALLOCNO_COLOR_DATA (a)->thread_freq = ALLOCNO_FREQ (a);
2115 }
2116}
2117
2118\f
2119
058e97ec
VM
2120/* This page contains the allocator based on the Chaitin-Briggs algorithm. */
2121
2122/* Bucket of allocnos that can colored currently without spilling. */
2123static ira_allocno_t colorable_allocno_bucket;
2124
2125/* Bucket of allocnos that might be not colored currently without
2126 spilling. */
2127static ira_allocno_t uncolorable_allocno_bucket;
2128
1756cb66
VM
2129/* The current number of allocnos in the uncolorable_bucket. */
2130static int uncolorable_allocnos_num;
058e97ec 2131
30ea859e
VM
2132/* Return the current spill priority of allocno A. The less the
2133 number, the more preferable the allocno for spilling. */
1756cb66 2134static inline int
30ea859e
VM
2135allocno_spill_priority (ira_allocno_t a)
2136{
1756cb66
VM
2137 allocno_color_data_t data = ALLOCNO_COLOR_DATA (a);
2138
2139 return (data->temp
2140 / (ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a)
2141 * ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]
30ea859e
VM
2142 + 1));
2143}
2144
1756cb66 2145/* Add allocno A to bucket *BUCKET_PTR. A should be not in a bucket
058e97ec
VM
2146 before the call. */
2147static void
1756cb66 2148add_allocno_to_bucket (ira_allocno_t a, ira_allocno_t *bucket_ptr)
058e97ec 2149{
1756cb66
VM
2150 ira_allocno_t first_a;
2151 allocno_color_data_t data;
058e97ec
VM
2152
2153 if (bucket_ptr == &uncolorable_allocno_bucket
1756cb66 2154 && ALLOCNO_CLASS (a) != NO_REGS)
058e97ec 2155 {
1756cb66
VM
2156 uncolorable_allocnos_num++;
2157 ira_assert (uncolorable_allocnos_num > 0);
058e97ec 2158 }
1756cb66
VM
2159 first_a = *bucket_ptr;
2160 data = ALLOCNO_COLOR_DATA (a);
2161 data->next_bucket_allocno = first_a;
2162 data->prev_bucket_allocno = NULL;
2163 if (first_a != NULL)
2164 ALLOCNO_COLOR_DATA (first_a)->prev_bucket_allocno = a;
2165 *bucket_ptr = a;
058e97ec
VM
2166}
2167
058e97ec
VM
2168/* Compare two allocnos to define which allocno should be pushed first
2169 into the coloring stack. If the return is a negative number, the
2170 allocno given by the first parameter will be pushed first. In this
2171 case such allocno has less priority than the second one and the
2172 hard register will be assigned to it after assignment to the second
2173 one. As the result of such assignment order, the second allocno
2174 has a better chance to get the best hard register. */
2175static int
2176bucket_allocno_compare_func (const void *v1p, const void *v2p)
2177{
2178 ira_allocno_t a1 = *(const ira_allocno_t *) v1p;
2179 ira_allocno_t a2 = *(const ira_allocno_t *) v2p;
bf08fb16
VM
2180 int diff, freq1, freq2, a1_num, a2_num;
2181 ira_allocno_t t1 = ALLOCNO_COLOR_DATA (a1)->first_thread_allocno;
2182 ira_allocno_t t2 = ALLOCNO_COLOR_DATA (a2)->first_thread_allocno;
9c3b0346
VM
2183 int cl1 = ALLOCNO_CLASS (a1), cl2 = ALLOCNO_CLASS (a2);
2184
bf08fb16
VM
2185 freq1 = ALLOCNO_COLOR_DATA (t1)->thread_freq;
2186 freq2 = ALLOCNO_COLOR_DATA (t2)->thread_freq;
2187 if ((diff = freq1 - freq2) != 0)
2188 return diff;
2189
2190 if ((diff = ALLOCNO_NUM (t2) - ALLOCNO_NUM (t1)) != 0)
2191 return diff;
2192
9c3b0346
VM
2193 /* Push pseudos requiring less hard registers first. It means that
2194 we will assign pseudos requiring more hard registers first
2195 avoiding creation small holes in free hard register file into
2196 which the pseudos requiring more hard registers can not fit. */
2197 if ((diff = (ira_reg_class_max_nregs[cl1][ALLOCNO_MODE (a1)]
2198 - ira_reg_class_max_nregs[cl2][ALLOCNO_MODE (a2)])) != 0)
058e97ec 2199 return diff;
bf08fb16
VM
2200
2201 freq1 = ALLOCNO_FREQ (a1);
2202 freq2 = ALLOCNO_FREQ (a2);
2203 if ((diff = freq1 - freq2) != 0)
058e97ec 2204 return diff;
bf08fb16 2205
1756cb66
VM
2206 a1_num = ALLOCNO_COLOR_DATA (a1)->available_regs_num;
2207 a2_num = ALLOCNO_COLOR_DATA (a2)->available_regs_num;
2208 if ((diff = a2_num - a1_num) != 0)
99710245 2209 return diff;
058e97ec
VM
2210 return ALLOCNO_NUM (a2) - ALLOCNO_NUM (a1);
2211}
2212
2213/* Sort bucket *BUCKET_PTR and return the result through
2214 BUCKET_PTR. */
2215static void
1756cb66
VM
2216sort_bucket (ira_allocno_t *bucket_ptr,
2217 int (*compare_func) (const void *, const void *))
058e97ec
VM
2218{
2219 ira_allocno_t a, head;
2220 int n;
2221
1756cb66
VM
2222 for (n = 0, a = *bucket_ptr;
2223 a != NULL;
2224 a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno)
058e97ec
VM
2225 sorted_allocnos[n++] = a;
2226 if (n <= 1)
2227 return;
1756cb66 2228 qsort (sorted_allocnos, n, sizeof (ira_allocno_t), compare_func);
058e97ec
VM
2229 head = NULL;
2230 for (n--; n >= 0; n--)
2231 {
2232 a = sorted_allocnos[n];
1756cb66
VM
2233 ALLOCNO_COLOR_DATA (a)->next_bucket_allocno = head;
2234 ALLOCNO_COLOR_DATA (a)->prev_bucket_allocno = NULL;
058e97ec 2235 if (head != NULL)
1756cb66 2236 ALLOCNO_COLOR_DATA (head)->prev_bucket_allocno = a;
058e97ec
VM
2237 head = a;
2238 }
2239 *bucket_ptr = head;
2240}
2241
bf08fb16 2242/* Add ALLOCNO to colorable bucket maintaining the order according
058e97ec
VM
2243 their priority. ALLOCNO should be not in a bucket before the
2244 call. */
2245static void
bf08fb16 2246add_allocno_to_ordered_colorable_bucket (ira_allocno_t allocno)
058e97ec
VM
2247{
2248 ira_allocno_t before, after;
058e97ec 2249
bf08fb16
VM
2250 form_threads_from_colorable_allocno (allocno);
2251 for (before = colorable_allocno_bucket, after = NULL;
058e97ec 2252 before != NULL;
1756cb66
VM
2253 after = before,
2254 before = ALLOCNO_COLOR_DATA (before)->next_bucket_allocno)
058e97ec
VM
2255 if (bucket_allocno_compare_func (&allocno, &before) < 0)
2256 break;
1756cb66
VM
2257 ALLOCNO_COLOR_DATA (allocno)->next_bucket_allocno = before;
2258 ALLOCNO_COLOR_DATA (allocno)->prev_bucket_allocno = after;
058e97ec 2259 if (after == NULL)
bf08fb16 2260 colorable_allocno_bucket = allocno;
058e97ec 2261 else
1756cb66 2262 ALLOCNO_COLOR_DATA (after)->next_bucket_allocno = allocno;
058e97ec 2263 if (before != NULL)
1756cb66 2264 ALLOCNO_COLOR_DATA (before)->prev_bucket_allocno = allocno;
058e97ec
VM
2265}
2266
2267/* Delete ALLOCNO from bucket *BUCKET_PTR. It should be there before
2268 the call. */
2269static void
2270delete_allocno_from_bucket (ira_allocno_t allocno, ira_allocno_t *bucket_ptr)
2271{
2272 ira_allocno_t prev_allocno, next_allocno;
058e97ec
VM
2273
2274 if (bucket_ptr == &uncolorable_allocno_bucket
1756cb66 2275 && ALLOCNO_CLASS (allocno) != NO_REGS)
058e97ec 2276 {
1756cb66
VM
2277 uncolorable_allocnos_num--;
2278 ira_assert (uncolorable_allocnos_num >= 0);
058e97ec 2279 }
1756cb66
VM
2280 prev_allocno = ALLOCNO_COLOR_DATA (allocno)->prev_bucket_allocno;
2281 next_allocno = ALLOCNO_COLOR_DATA (allocno)->next_bucket_allocno;
058e97ec 2282 if (prev_allocno != NULL)
1756cb66 2283 ALLOCNO_COLOR_DATA (prev_allocno)->next_bucket_allocno = next_allocno;
058e97ec
VM
2284 else
2285 {
2286 ira_assert (*bucket_ptr == allocno);
2287 *bucket_ptr = next_allocno;
2288 }
2289 if (next_allocno != NULL)
1756cb66 2290 ALLOCNO_COLOR_DATA (next_allocno)->prev_bucket_allocno = prev_allocno;
058e97ec
VM
2291}
2292
22b0982c 2293/* Put allocno A onto the coloring stack without removing it from its
058e97ec
VM
2294 bucket. Pushing allocno to the coloring stack can result in moving
2295 conflicting allocnos from the uncolorable bucket to the colorable
2296 one. */
2297static void
22b0982c 2298push_allocno_to_stack (ira_allocno_t a)
058e97ec 2299{
1756cb66
VM
2300 enum reg_class aclass;
2301 allocno_color_data_t data, conflict_data;
2302 int size, i, n = ALLOCNO_NUM_OBJECTS (a);
2303
2304 data = ALLOCNO_COLOR_DATA (a);
2305 data->in_graph_p = false;
9771b263 2306 allocno_stack_vec.safe_push (a);
1756cb66
VM
2307 aclass = ALLOCNO_CLASS (a);
2308 if (aclass == NO_REGS)
058e97ec 2309 return;
1756cb66
VM
2310 size = ira_reg_class_max_nregs[aclass][ALLOCNO_MODE (a)];
2311 if (n > 1)
ac0ab4f7
BS
2312 {
2313 /* We will deal with the subwords individually. */
22b0982c 2314 gcc_assert (size == ALLOCNO_NUM_OBJECTS (a));
ac0ab4f7
BS
2315 size = 1;
2316 }
22b0982c 2317 for (i = 0; i < n; i++)
058e97ec 2318 {
22b0982c 2319 ira_object_t obj = ALLOCNO_OBJECT (a, i);
22b0982c
VM
2320 ira_object_t conflict_obj;
2321 ira_object_conflict_iterator oci;
2322
2323 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
548a6322 2324 {
22b0982c 2325 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
22b0982c 2326
1756cb66
VM
2327 conflict_data = ALLOCNO_COLOR_DATA (conflict_a);
2328 if (conflict_data->colorable_p
2329 || ! conflict_data->in_graph_p
2330 || ALLOCNO_ASSIGNED_P (conflict_a)
2331 || !(hard_reg_set_intersect_p
27508f5f
VM
2332 (ALLOCNO_COLOR_DATA (a)->profitable_hard_regs,
2333 conflict_data->profitable_hard_regs)))
22b0982c 2334 continue;
1756cb66
VM
2335 ira_assert (bitmap_bit_p (coloring_allocno_bitmap,
2336 ALLOCNO_NUM (conflict_a)));
27508f5f 2337 if (update_left_conflict_sizes_p (conflict_a, a, size))
22b0982c
VM
2338 {
2339 delete_allocno_from_bucket
27508f5f 2340 (conflict_a, &uncolorable_allocno_bucket);
bf08fb16 2341 add_allocno_to_ordered_colorable_bucket (conflict_a);
1756cb66
VM
2342 if (internal_flag_ira_verbose > 4 && ira_dump_file != NULL)
2343 {
2344 fprintf (ira_dump_file, " Making");
2345 ira_print_expanded_allocno (conflict_a);
2346 fprintf (ira_dump_file, " colorable\n");
2347 }
548a6322 2348 }
1756cb66 2349
548a6322 2350 }
058e97ec
VM
2351 }
2352}
2353
2354/* Put ALLOCNO onto the coloring stack and remove it from its bucket.
2355 The allocno is in the colorable bucket if COLORABLE_P is TRUE. */
2356static void
2357remove_allocno_from_bucket_and_push (ira_allocno_t allocno, bool colorable_p)
2358{
058e97ec
VM
2359 if (colorable_p)
2360 delete_allocno_from_bucket (allocno, &colorable_allocno_bucket);
2361 else
2362 delete_allocno_from_bucket (allocno, &uncolorable_allocno_bucket);
2363 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2364 {
2365 fprintf (ira_dump_file, " Pushing");
22b0982c 2366 ira_print_expanded_allocno (allocno);
30ea859e 2367 if (colorable_p)
1756cb66
VM
2368 fprintf (ira_dump_file, "(cost %d)\n",
2369 ALLOCNO_COLOR_DATA (allocno)->temp);
30ea859e
VM
2370 else
2371 fprintf (ira_dump_file, "(potential spill: %spri=%d, cost=%d)\n",
2372 ALLOCNO_BAD_SPILL_P (allocno) ? "bad spill, " : "",
1756cb66
VM
2373 allocno_spill_priority (allocno),
2374 ALLOCNO_COLOR_DATA (allocno)->temp);
2375 }
058e97ec 2376 if (! colorable_p)
1756cb66 2377 ALLOCNO_COLOR_DATA (allocno)->may_be_spilled_p = true;
548a6322 2378 push_allocno_to_stack (allocno);
058e97ec
VM
2379}
2380
2381/* Put all allocnos from colorable bucket onto the coloring stack. */
2382static void
2383push_only_colorable (void)
2384{
bf08fb16 2385 form_threads_from_bucket (colorable_allocno_bucket);
1756cb66 2386 sort_bucket (&colorable_allocno_bucket, bucket_allocno_compare_func);
058e97ec
VM
2387 for (;colorable_allocno_bucket != NULL;)
2388 remove_allocno_from_bucket_and_push (colorable_allocno_bucket, true);
2389}
2390
058e97ec 2391/* Return the frequency of exit edges (if EXIT_P) or entry from/to the
b8698a0f 2392 loop given by its LOOP_NODE. */
058e97ec
VM
2393int
2394ira_loop_edge_freq (ira_loop_tree_node_t loop_node, int regno, bool exit_p)
2395{
2396 int freq, i;
2397 edge_iterator ei;
2398 edge e;
9771b263 2399 vec<edge> edges;
058e97ec 2400
2608d841 2401 ira_assert (current_loops != NULL && loop_node->loop != NULL
058e97ec
VM
2402 && (regno < 0 || regno >= FIRST_PSEUDO_REGISTER));
2403 freq = 0;
2404 if (! exit_p)
2405 {
2406 FOR_EACH_EDGE (e, ei, loop_node->loop->header->preds)
2407 if (e->src != loop_node->loop->latch
2408 && (regno < 0
bf744527
SB
2409 || (bitmap_bit_p (df_get_live_out (e->src), regno)
2410 && bitmap_bit_p (df_get_live_in (e->dest), regno))))
058e97ec
VM
2411 freq += EDGE_FREQUENCY (e);
2412 }
2413 else
2414 {
2415 edges = get_loop_exit_edges (loop_node->loop);
9771b263 2416 FOR_EACH_VEC_ELT (edges, i, e)
058e97ec 2417 if (regno < 0
bf744527
SB
2418 || (bitmap_bit_p (df_get_live_out (e->src), regno)
2419 && bitmap_bit_p (df_get_live_in (e->dest), regno)))
058e97ec 2420 freq += EDGE_FREQUENCY (e);
9771b263 2421 edges.release ();
058e97ec
VM
2422 }
2423
2424 return REG_FREQ_FROM_EDGE_FREQ (freq);
2425}
2426
2427/* Calculate and return the cost of putting allocno A into memory. */
2428static int
2429calculate_allocno_spill_cost (ira_allocno_t a)
2430{
2431 int regno, cost;
2432 enum machine_mode mode;
2433 enum reg_class rclass;
2434 ira_allocno_t parent_allocno;
2435 ira_loop_tree_node_t parent_node, loop_node;
2436
2437 regno = ALLOCNO_REGNO (a);
1756cb66 2438 cost = ALLOCNO_UPDATED_MEMORY_COST (a) - ALLOCNO_UPDATED_CLASS_COST (a);
058e97ec
VM
2439 if (ALLOCNO_CAP (a) != NULL)
2440 return cost;
2441 loop_node = ALLOCNO_LOOP_TREE_NODE (a);
2442 if ((parent_node = loop_node->parent) == NULL)
2443 return cost;
2444 if ((parent_allocno = parent_node->regno_allocno_map[regno]) == NULL)
2445 return cost;
2446 mode = ALLOCNO_MODE (a);
1756cb66 2447 rclass = ALLOCNO_CLASS (a);
058e97ec
VM
2448 if (ALLOCNO_HARD_REGNO (parent_allocno) < 0)
2449 cost -= (ira_memory_move_cost[mode][rclass][0]
2450 * ira_loop_edge_freq (loop_node, regno, true)
2451 + ira_memory_move_cost[mode][rclass][1]
2452 * ira_loop_edge_freq (loop_node, regno, false));
2453 else
1756cb66
VM
2454 {
2455 ira_init_register_move_cost_if_necessary (mode);
2456 cost += ((ira_memory_move_cost[mode][rclass][1]
2457 * ira_loop_edge_freq (loop_node, regno, true)
2458 + ira_memory_move_cost[mode][rclass][0]
2459 * ira_loop_edge_freq (loop_node, regno, false))
2460 - (ira_register_move_cost[mode][rclass][rclass]
2461 * (ira_loop_edge_freq (loop_node, regno, false)
2462 + ira_loop_edge_freq (loop_node, regno, true))));
2463 }
058e97ec
VM
2464 return cost;
2465}
2466
1756cb66
VM
2467/* Used for sorting allocnos for spilling. */
2468static inline int
2469allocno_spill_priority_compare (ira_allocno_t a1, ira_allocno_t a2)
058e97ec
VM
2470{
2471 int pri1, pri2, diff;
b8698a0f 2472
1756cb66
VM
2473 if (ALLOCNO_BAD_SPILL_P (a1) && ! ALLOCNO_BAD_SPILL_P (a2))
2474 return 1;
2475 if (ALLOCNO_BAD_SPILL_P (a2) && ! ALLOCNO_BAD_SPILL_P (a1))
2476 return -1;
2477 pri1 = allocno_spill_priority (a1);
2478 pri2 = allocno_spill_priority (a2);
058e97ec
VM
2479 if ((diff = pri1 - pri2) != 0)
2480 return diff;
1756cb66
VM
2481 if ((diff
2482 = ALLOCNO_COLOR_DATA (a1)->temp - ALLOCNO_COLOR_DATA (a2)->temp) != 0)
058e97ec
VM
2483 return diff;
2484 return ALLOCNO_NUM (a1) - ALLOCNO_NUM (a2);
2485}
2486
1756cb66
VM
2487/* Used for sorting allocnos for spilling. */
2488static int
2489allocno_spill_sort_compare (const void *v1p, const void *v2p)
99710245 2490{
1756cb66
VM
2491 ira_allocno_t p1 = *(const ira_allocno_t *) v1p;
2492 ira_allocno_t p2 = *(const ira_allocno_t *) v2p;
99710245 2493
1756cb66 2494 return allocno_spill_priority_compare (p1, p2);
058e97ec
VM
2495}
2496
2497/* Push allocnos to the coloring stack. The order of allocnos in the
1756cb66
VM
2498 stack defines the order for the subsequent coloring. */
2499static void
2500push_allocnos_to_stack (void)
2501{
2502 ira_allocno_t a;
2503 int cost;
2504
2505 /* Calculate uncolorable allocno spill costs. */
2506 for (a = uncolorable_allocno_bucket;
2507 a != NULL;
2508 a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno)
2509 if (ALLOCNO_CLASS (a) != NO_REGS)
2510 {
2511 cost = calculate_allocno_spill_cost (a);
2512 /* ??? Remove cost of copies between the coalesced
2513 allocnos. */
2514 ALLOCNO_COLOR_DATA (a)->temp = cost;
2515 }
2516 sort_bucket (&uncolorable_allocno_bucket, allocno_spill_sort_compare);
2517 for (;;)
2518 {
2519 push_only_colorable ();
2520 a = uncolorable_allocno_bucket;
2521 if (a == NULL)
2522 break;
2523 remove_allocno_from_bucket_and_push (a, false);
058e97ec
VM
2524 }
2525 ira_assert (colorable_allocno_bucket == NULL
2526 && uncolorable_allocno_bucket == NULL);
1756cb66 2527 ira_assert (uncolorable_allocnos_num == 0);
058e97ec
VM
2528}
2529
2530/* Pop the coloring stack and assign hard registers to the popped
2531 allocnos. */
2532static void
2533pop_allocnos_from_stack (void)
2534{
2535 ira_allocno_t allocno;
1756cb66 2536 enum reg_class aclass;
058e97ec 2537
9771b263 2538 for (;allocno_stack_vec.length () != 0;)
058e97ec 2539 {
9771b263 2540 allocno = allocno_stack_vec.pop ();
1756cb66 2541 aclass = ALLOCNO_CLASS (allocno);
058e97ec
VM
2542 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2543 {
2544 fprintf (ira_dump_file, " Popping");
22b0982c 2545 ira_print_expanded_allocno (allocno);
058e97ec
VM
2546 fprintf (ira_dump_file, " -- ");
2547 }
1756cb66 2548 if (aclass == NO_REGS)
058e97ec
VM
2549 {
2550 ALLOCNO_HARD_REGNO (allocno) = -1;
2551 ALLOCNO_ASSIGNED_P (allocno) = true;
2552 ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (allocno) == NULL);
2553 ira_assert
2554 (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno) == NULL);
2555 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2556 fprintf (ira_dump_file, "assign memory\n");
2557 }
2558 else if (assign_hard_reg (allocno, false))
2559 {
2560 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2561 fprintf (ira_dump_file, "assign reg %d\n",
2562 ALLOCNO_HARD_REGNO (allocno));
2563 }
2564 else if (ALLOCNO_ASSIGNED_P (allocno))
2565 {
2566 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3b6d1699
VM
2567 fprintf (ira_dump_file, "spill%s\n",
2568 ALLOCNO_COLOR_DATA (allocno)->may_be_spilled_p
2569 ? "" : "!");
058e97ec 2570 }
1756cb66 2571 ALLOCNO_COLOR_DATA (allocno)->in_graph_p = true;
ac0ab4f7
BS
2572 }
2573}
2574
22b0982c 2575/* Set up number of available hard registers for allocno A. */
058e97ec 2576static void
22b0982c 2577setup_allocno_available_regs_num (ira_allocno_t a)
058e97ec 2578{
27508f5f 2579 int i, n, hard_regno, hard_regs_num, nwords;
1756cb66 2580 enum reg_class aclass;
1756cb66 2581 allocno_color_data_t data;
058e97ec 2582
1756cb66
VM
2583 aclass = ALLOCNO_CLASS (a);
2584 data = ALLOCNO_COLOR_DATA (a);
2585 data->available_regs_num = 0;
2586 if (aclass == NO_REGS)
058e97ec 2587 return;
1756cb66 2588 hard_regs_num = ira_class_hard_regs_num[aclass];
1756cb66 2589 nwords = ALLOCNO_NUM_OBJECTS (a);
058e97ec 2590 for (n = 0, i = hard_regs_num - 1; i >= 0; i--)
478ab26d 2591 {
1756cb66 2592 hard_regno = ira_class_hard_regs[aclass][i];
27508f5f
VM
2593 /* Checking only profitable hard regs. */
2594 if (TEST_HARD_REG_BIT (data->profitable_hard_regs, hard_regno))
478ab26d
VM
2595 n++;
2596 }
1756cb66
VM
2597 data->available_regs_num = n;
2598 if (internal_flag_ira_verbose <= 2 || ira_dump_file == NULL)
2599 return;
2600 fprintf
2601 (ira_dump_file,
27508f5f 2602 " Allocno a%dr%d of %s(%d) has %d avail. regs ",
1756cb66
VM
2603 ALLOCNO_NUM (a), ALLOCNO_REGNO (a),
2604 reg_class_names[aclass], ira_class_hard_regs_num[aclass], n);
27508f5f
VM
2605 print_hard_reg_set (ira_dump_file, data->profitable_hard_regs, false);
2606 fprintf (ira_dump_file, ", %snode: ",
2607 hard_reg_set_equal_p (data->profitable_hard_regs,
2608 data->hard_regs_node->hard_regs->set)
2609 ? "" : "^");
2610 print_hard_reg_set (ira_dump_file,
2611 data->hard_regs_node->hard_regs->set, false);
1756cb66 2612 for (i = 0; i < nwords; i++)
22b0982c 2613 {
1756cb66 2614 ira_object_t obj = ALLOCNO_OBJECT (a, i);
ac0ab4f7 2615
1756cb66 2616 if (nwords != 1)
22b0982c 2617 {
1756cb66
VM
2618 if (i != 0)
2619 fprintf (ira_dump_file, ", ");
2620 fprintf (ira_dump_file, " obj %d", i);
22b0982c 2621 }
1756cb66
VM
2622 fprintf (ira_dump_file, " (confl regs = ");
2623 print_hard_reg_set (ira_dump_file, OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
2624 false);
27508f5f 2625 fprintf (ira_dump_file, ")");
22b0982c 2626 }
1756cb66 2627 fprintf (ira_dump_file, "\n");
058e97ec
VM
2628}
2629
2630/* Put ALLOCNO in a bucket corresponding to its number and size of its
2631 conflicting allocnos and hard registers. */
2632static void
2633put_allocno_into_bucket (ira_allocno_t allocno)
2634{
1756cb66 2635 ALLOCNO_COLOR_DATA (allocno)->in_graph_p = true;
058e97ec 2636 setup_allocno_available_regs_num (allocno);
1756cb66 2637 if (setup_left_conflict_sizes_p (allocno))
548a6322 2638 add_allocno_to_bucket (allocno, &colorable_allocno_bucket);
058e97ec 2639 else
548a6322 2640 add_allocno_to_bucket (allocno, &uncolorable_allocno_bucket);
058e97ec
VM
2641}
2642
22b0982c
VM
2643/* Map: allocno number -> allocno priority. */
2644static int *allocno_priorities;
058e97ec 2645
22b0982c
VM
2646/* Set up priorities for N allocnos in array
2647 CONSIDERATION_ALLOCNOS. */
058e97ec 2648static void
22b0982c 2649setup_allocno_priorities (ira_allocno_t *consideration_allocnos, int n)
058e97ec 2650{
22b0982c
VM
2651 int i, length, nrefs, priority, max_priority, mult;
2652 ira_allocno_t a;
058e97ec 2653
22b0982c
VM
2654 max_priority = 0;
2655 for (i = 0; i < n; i++)
7db7ed3c
VM
2656 {
2657 a = consideration_allocnos[i];
2658 nrefs = ALLOCNO_NREFS (a);
2659 ira_assert (nrefs >= 0);
2660 mult = floor_log2 (ALLOCNO_NREFS (a)) + 1;
2661 ira_assert (mult >= 0);
2662 allocno_priorities[ALLOCNO_NUM (a)]
2663 = priority
2664 = (mult
1756cb66
VM
2665 * (ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a))
2666 * ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]);
7db7ed3c
VM
2667 if (priority < 0)
2668 priority = -priority;
2669 if (max_priority < priority)
2670 max_priority = priority;
2671 }
2672 mult = max_priority == 0 ? 1 : INT_MAX / max_priority;
2673 for (i = 0; i < n; i++)
2674 {
2675 a = consideration_allocnos[i];
2676 length = ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a);
ac0ab4f7
BS
2677 if (ALLOCNO_NUM_OBJECTS (a) > 1)
2678 length /= ALLOCNO_NUM_OBJECTS (a);
7db7ed3c
VM
2679 if (length <= 0)
2680 length = 1;
2681 allocno_priorities[ALLOCNO_NUM (a)]
2682 = allocno_priorities[ALLOCNO_NUM (a)] * mult / length;
2683 }
2684}
2685
1756cb66
VM
2686/* Sort allocnos according to the profit of usage of a hard register
2687 instead of memory for them. */
2688static int
2689allocno_cost_compare_func (const void *v1p, const void *v2p)
2690{
2691 ira_allocno_t p1 = *(const ira_allocno_t *) v1p;
2692 ira_allocno_t p2 = *(const ira_allocno_t *) v2p;
2693 int c1, c2;
2694
2695 c1 = ALLOCNO_UPDATED_MEMORY_COST (p1) - ALLOCNO_UPDATED_CLASS_COST (p1);
2696 c2 = ALLOCNO_UPDATED_MEMORY_COST (p2) - ALLOCNO_UPDATED_CLASS_COST (p2);
2697 if (c1 - c2)
2698 return c1 - c2;
2699
2700 /* If regs are equally good, sort by allocno numbers, so that the
2701 results of qsort leave nothing to chance. */
2702 return ALLOCNO_NUM (p1) - ALLOCNO_NUM (p2);
2703}
2704
2705/* We used Chaitin-Briggs coloring to assign as many pseudos as
2706 possible to hard registers. Let us try to improve allocation with
2707 cost point of view. This function improves the allocation by
2708 spilling some allocnos and assigning the freed hard registers to
2709 other allocnos if it decreases the overall allocation cost. */
2710static void
2711improve_allocation (void)
2712{
2713 unsigned int i;
2714 int j, k, n, hregno, conflict_hregno, base_cost, class_size, word, nwords;
2715 int check, spill_cost, min_cost, nregs, conflict_nregs, r, best;
2716 bool try_p;
2717 enum reg_class aclass;
2718 enum machine_mode mode;
2719 int *allocno_costs;
2720 int costs[FIRST_PSEUDO_REGISTER];
27508f5f 2721 HARD_REG_SET conflicting_regs[2], profitable_hard_regs;
1756cb66
VM
2722 ira_allocno_t a;
2723 bitmap_iterator bi;
2724
2725 /* Clear counts used to process conflicting allocnos only once for
2726 each allocno. */
2727 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
2728 ALLOCNO_COLOR_DATA (ira_allocnos[i])->temp = 0;
2729 check = n = 0;
2730 /* Process each allocno and try to assign a hard register to it by
2731 spilling some its conflicting allocnos. */
2732 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
2733 {
2734 a = ira_allocnos[i];
2735 ALLOCNO_COLOR_DATA (a)->temp = 0;
2736 if (empty_profitable_hard_regs (a))
2737 continue;
2738 check++;
2739 aclass = ALLOCNO_CLASS (a);
2740 allocno_costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a);
2741 if (allocno_costs == NULL)
2742 allocno_costs = ALLOCNO_HARD_REG_COSTS (a);
2743 if ((hregno = ALLOCNO_HARD_REGNO (a)) < 0)
2744 base_cost = ALLOCNO_UPDATED_MEMORY_COST (a);
2745 else if (allocno_costs == NULL)
2746 /* It means that assigning a hard register is not profitable
2747 (we don't waste memory for hard register costs in this
2748 case). */
2749 continue;
2750 else
2751 base_cost = allocno_costs[ira_class_hard_reg_index[aclass][hregno]];
2752 try_p = false;
27508f5f
VM
2753 get_conflict_and_start_profitable_regs (a, false,
2754 conflicting_regs,
2755 &profitable_hard_regs);
1756cb66
VM
2756 class_size = ira_class_hard_regs_num[aclass];
2757 /* Set up cost improvement for usage of each profitable hard
2758 register for allocno A. */
2759 for (j = 0; j < class_size; j++)
2760 {
2761 hregno = ira_class_hard_regs[aclass][j];
2762 if (! check_hard_reg_p (a, hregno,
2763 conflicting_regs, profitable_hard_regs))
2764 continue;
2765 ira_assert (ira_class_hard_reg_index[aclass][hregno] == j);
2766 k = allocno_costs == NULL ? 0 : j;
2767 costs[hregno] = (allocno_costs == NULL
2768 ? ALLOCNO_UPDATED_CLASS_COST (a) : allocno_costs[k]);
2769 costs[hregno] -= base_cost;
2770 if (costs[hregno] < 0)
2771 try_p = true;
2772 }
2773 if (! try_p)
2774 /* There is no chance to improve the allocation cost by
2775 assigning hard register to allocno A even without spilling
2776 conflicting allocnos. */
2777 continue;
2778 mode = ALLOCNO_MODE (a);
2779 nwords = ALLOCNO_NUM_OBJECTS (a);
2780 /* Process each allocno conflicting with A and update the cost
2781 improvement for profitable hard registers of A. To use a
2782 hard register for A we need to spill some conflicting
2783 allocnos and that creates penalty for the cost
2784 improvement. */
2785 for (word = 0; word < nwords; word++)
2786 {
2787 ira_object_t conflict_obj;
2788 ira_object_t obj = ALLOCNO_OBJECT (a, word);
2789 ira_object_conflict_iterator oci;
2790
2791 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
2792 {
2793 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
2794
2795 if (ALLOCNO_COLOR_DATA (conflict_a)->temp == check)
2796 /* We already processed this conflicting allocno
2797 because we processed earlier another object of the
2798 conflicting allocno. */
2799 continue;
2800 ALLOCNO_COLOR_DATA (conflict_a)->temp = check;
2801 if ((conflict_hregno = ALLOCNO_HARD_REGNO (conflict_a)) < 0)
2802 continue;
2803 spill_cost = ALLOCNO_UPDATED_MEMORY_COST (conflict_a);
2804 k = (ira_class_hard_reg_index
2805 [ALLOCNO_CLASS (conflict_a)][conflict_hregno]);
2806 ira_assert (k >= 0);
2807 if ((allocno_costs = ALLOCNO_UPDATED_HARD_REG_COSTS (conflict_a))
2808 != NULL)
2809 spill_cost -= allocno_costs[k];
2810 else if ((allocno_costs = ALLOCNO_HARD_REG_COSTS (conflict_a))
2811 != NULL)
2812 spill_cost -= allocno_costs[k];
2813 else
2814 spill_cost -= ALLOCNO_UPDATED_CLASS_COST (conflict_a);
2815 conflict_nregs
2816 = hard_regno_nregs[conflict_hregno][ALLOCNO_MODE (conflict_a)];
2817 for (r = conflict_hregno;
2818 r >= 0 && r + hard_regno_nregs[r][mode] > conflict_hregno;
2819 r--)
2820 if (check_hard_reg_p (a, r,
2821 conflicting_regs, profitable_hard_regs))
2822 costs[r] += spill_cost;
2823 for (r = conflict_hregno + 1;
2824 r < conflict_hregno + conflict_nregs;
2825 r++)
2826 if (check_hard_reg_p (a, r,
2827 conflicting_regs, profitable_hard_regs))
2828 costs[r] += spill_cost;
2829 }
2830 }
2831 min_cost = INT_MAX;
2832 best = -1;
2833 /* Now we choose hard register for A which results in highest
2834 allocation cost improvement. */
2835 for (j = 0; j < class_size; j++)
2836 {
2837 hregno = ira_class_hard_regs[aclass][j];
2838 if (check_hard_reg_p (a, hregno,
2839 conflicting_regs, profitable_hard_regs)
2840 && min_cost > costs[hregno])
2841 {
2842 best = hregno;
2843 min_cost = costs[hregno];
2844 }
2845 }
2846 if (min_cost >= 0)
2847 /* We are in a situation when assigning any hard register to A
2848 by spilling some conflicting allocnos does not improve the
2849 allocation cost. */
2850 continue;
2851 nregs = hard_regno_nregs[best][mode];
2852 /* Now spill conflicting allocnos which contain a hard register
2853 of A when we assign the best chosen hard register to it. */
2854 for (word = 0; word < nwords; word++)
2855 {
2856 ira_object_t conflict_obj;
2857 ira_object_t obj = ALLOCNO_OBJECT (a, word);
2858 ira_object_conflict_iterator oci;
2859
2860 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
2861 {
2862 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
2863
2864 if ((conflict_hregno = ALLOCNO_HARD_REGNO (conflict_a)) < 0)
2865 continue;
2866 conflict_nregs
2867 = hard_regno_nregs[conflict_hregno][ALLOCNO_MODE (conflict_a)];
2868 if (best + nregs <= conflict_hregno
2869 || conflict_hregno + conflict_nregs <= best)
2870 /* No intersection. */
2871 continue;
2872 ALLOCNO_HARD_REGNO (conflict_a) = -1;
2873 sorted_allocnos[n++] = conflict_a;
2874 if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
2875 fprintf (ira_dump_file, "Spilling a%dr%d for a%dr%d\n",
2876 ALLOCNO_NUM (conflict_a), ALLOCNO_REGNO (conflict_a),
2877 ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
2878 }
2879 }
2880 /* Assign the best chosen hard register to A. */
2881 ALLOCNO_HARD_REGNO (a) = best;
2882 if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
2883 fprintf (ira_dump_file, "Assigning %d to a%dr%d\n",
2884 best, ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
2885 }
2886 if (n == 0)
2887 return;
2888 /* We spilled some allocnos to assign their hard registers to other
2889 allocnos. The spilled allocnos are now in array
2890 'sorted_allocnos'. There is still a possibility that some of the
2891 spilled allocnos can get hard registers. So let us try assign
2892 them hard registers again (just a reminder -- function
2893 'assign_hard_reg' assigns hard registers only if it is possible
2894 and profitable). We process the spilled allocnos with biggest
2895 benefit to get hard register first -- see function
2896 'allocno_cost_compare_func'. */
2897 qsort (sorted_allocnos, n, sizeof (ira_allocno_t),
2898 allocno_cost_compare_func);
2899 for (j = 0; j < n; j++)
2900 {
2901 a = sorted_allocnos[j];
2902 ALLOCNO_ASSIGNED_P (a) = false;
2903 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2904 {
2905 fprintf (ira_dump_file, " ");
2906 ira_print_expanded_allocno (a);
2907 fprintf (ira_dump_file, " -- ");
2908 }
2909 if (assign_hard_reg (a, false))
2910 {
2911 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2912 fprintf (ira_dump_file, "assign hard reg %d\n",
2913 ALLOCNO_HARD_REGNO (a));
2914 }
2915 else
2916 {
2917 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2918 fprintf (ira_dump_file, "assign memory\n");
2919 }
2920 }
2921}
2922
aeb9f7cf 2923/* Sort allocnos according to their priorities. */
7db7ed3c
VM
2924static int
2925allocno_priority_compare_func (const void *v1p, const void *v2p)
2926{
2927 ira_allocno_t a1 = *(const ira_allocno_t *) v1p;
2928 ira_allocno_t a2 = *(const ira_allocno_t *) v2p;
2929 int pri1, pri2;
2930
2931 pri1 = allocno_priorities[ALLOCNO_NUM (a1)];
2932 pri2 = allocno_priorities[ALLOCNO_NUM (a2)];
71af27d2
OH
2933 if (pri2 != pri1)
2934 return SORTGT (pri2, pri1);
7db7ed3c
VM
2935
2936 /* If regs are equally good, sort by allocnos, so that the results of
2937 qsort leave nothing to chance. */
2938 return ALLOCNO_NUM (a1) - ALLOCNO_NUM (a2);
2939}
2940
058e97ec
VM
2941/* Chaitin-Briggs coloring for allocnos in COLORING_ALLOCNO_BITMAP
2942 taking into account allocnos in CONSIDERATION_ALLOCNO_BITMAP. */
2943static void
2944color_allocnos (void)
2945{
7db7ed3c 2946 unsigned int i, n;
058e97ec
VM
2947 bitmap_iterator bi;
2948 ira_allocno_t a;
2949
76763a6d 2950 setup_profitable_hard_regs ();
3b6d1699
VM
2951 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
2952 {
2953 int l, nr;
2954 HARD_REG_SET conflict_hard_regs;
2955 allocno_color_data_t data;
2956 ira_pref_t pref, next_pref;
2957
2958 a = ira_allocnos[i];
2959 nr = ALLOCNO_NUM_OBJECTS (a);
2960 CLEAR_HARD_REG_SET (conflict_hard_regs);
2961 for (l = 0; l < nr; l++)
2962 {
2963 ira_object_t obj = ALLOCNO_OBJECT (a, l);
2964 IOR_HARD_REG_SET (conflict_hard_regs,
2965 OBJECT_CONFLICT_HARD_REGS (obj));
2966 }
2967 data = ALLOCNO_COLOR_DATA (a);
2968 for (pref = ALLOCNO_PREFS (a); pref != NULL; pref = next_pref)
2969 {
2970 next_pref = pref->next_pref;
2971 if (! ira_hard_reg_in_set_p (pref->hard_regno,
2972 ALLOCNO_MODE (a),
2973 data->profitable_hard_regs))
2974 ira_remove_pref (pref);
2975 }
2976 }
7db7ed3c 2977 if (flag_ira_algorithm == IRA_ALGORITHM_PRIORITY)
058e97ec 2978 {
7db7ed3c
VM
2979 n = 0;
2980 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
058e97ec 2981 {
7db7ed3c 2982 a = ira_allocnos[i];
1756cb66 2983 if (ALLOCNO_CLASS (a) == NO_REGS)
058e97ec 2984 {
7db7ed3c
VM
2985 ALLOCNO_HARD_REGNO (a) = -1;
2986 ALLOCNO_ASSIGNED_P (a) = true;
2987 ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL);
2988 ira_assert (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a) == NULL);
2989 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2990 {
2991 fprintf (ira_dump_file, " Spill");
22b0982c 2992 ira_print_expanded_allocno (a);
7db7ed3c
VM
2993 fprintf (ira_dump_file, "\n");
2994 }
2995 continue;
058e97ec 2996 }
7db7ed3c
VM
2997 sorted_allocnos[n++] = a;
2998 }
2999 if (n != 0)
3000 {
3001 setup_allocno_priorities (sorted_allocnos, n);
3002 qsort (sorted_allocnos, n, sizeof (ira_allocno_t),
3003 allocno_priority_compare_func);
3004 for (i = 0; i < n; i++)
3005 {
3006 a = sorted_allocnos[i];
3007 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3008 {
3009 fprintf (ira_dump_file, " ");
22b0982c 3010 ira_print_expanded_allocno (a);
7db7ed3c
VM
3011 fprintf (ira_dump_file, " -- ");
3012 }
3013 if (assign_hard_reg (a, false))
3014 {
3015 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3016 fprintf (ira_dump_file, "assign hard reg %d\n",
3017 ALLOCNO_HARD_REGNO (a));
3018 }
3019 else
3020 {
3021 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3022 fprintf (ira_dump_file, "assign memory\n");
3023 }
3024 }
3025 }
3026 }
3027 else
3028 {
27508f5f 3029 form_allocno_hard_regs_nodes_forest ();
1756cb66
VM
3030 if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
3031 print_hard_regs_forest (ira_dump_file);
7db7ed3c
VM
3032 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
3033 {
3034 a = ira_allocnos[i];
1756cb66 3035 if (ALLOCNO_CLASS (a) != NO_REGS && ! empty_profitable_hard_regs (a))
3b6d1699
VM
3036 {
3037 ALLOCNO_COLOR_DATA (a)->in_graph_p = true;
3038 update_costs_from_prefs (a);
3039 }
1756cb66 3040 else
7db7ed3c
VM
3041 {
3042 ALLOCNO_HARD_REGNO (a) = -1;
3043 ALLOCNO_ASSIGNED_P (a) = true;
1756cb66
VM
3044 /* We don't need updated costs anymore. */
3045 ira_free_allocno_updated_costs (a);
7db7ed3c
VM
3046 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3047 {
3048 fprintf (ira_dump_file, " Spill");
22b0982c 3049 ira_print_expanded_allocno (a);
7db7ed3c
VM
3050 fprintf (ira_dump_file, "\n");
3051 }
7db7ed3c 3052 }
1756cb66
VM
3053 }
3054 /* Put the allocnos into the corresponding buckets. */
3055 colorable_allocno_bucket = NULL;
3056 uncolorable_allocno_bucket = NULL;
3057 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
3058 {
3059 a = ira_allocnos[i];
3060 if (ALLOCNO_COLOR_DATA (a)->in_graph_p)
3061 put_allocno_into_bucket (a);
058e97ec 3062 }
7db7ed3c
VM
3063 push_allocnos_to_stack ();
3064 pop_allocnos_from_stack ();
27508f5f 3065 finish_allocno_hard_regs_nodes_forest ();
058e97ec 3066 }
1756cb66 3067 improve_allocation ();
058e97ec
VM
3068}
3069
3070\f
3071
3072/* Output information about the loop given by its LOOP_TREE_NODE. */
3073static void
3074print_loop_title (ira_loop_tree_node_t loop_tree_node)
3075{
3076 unsigned int j;
3077 bitmap_iterator bi;
ea1c67e6
VM
3078 ira_loop_tree_node_t subloop_node, dest_loop_node;
3079 edge e;
3080 edge_iterator ei;
058e97ec 3081
2608d841
VM
3082 if (loop_tree_node->parent == NULL)
3083 fprintf (ira_dump_file,
3084 "\n Loop 0 (parent -1, header bb%d, depth 0)\n bbs:",
3085 NUM_FIXED_BLOCKS);
3086 else
3087 {
3088 ira_assert (current_loops != NULL && loop_tree_node->loop != NULL);
3089 fprintf (ira_dump_file,
3090 "\n Loop %d (parent %d, header bb%d, depth %d)\n bbs:",
3091 loop_tree_node->loop_num, loop_tree_node->parent->loop_num,
3092 loop_tree_node->loop->header->index,
3093 loop_depth (loop_tree_node->loop));
3094 }
ea1c67e6
VM
3095 for (subloop_node = loop_tree_node->children;
3096 subloop_node != NULL;
3097 subloop_node = subloop_node->next)
3098 if (subloop_node->bb != NULL)
3099 {
3100 fprintf (ira_dump_file, " %d", subloop_node->bb->index);
3101 FOR_EACH_EDGE (e, ei, subloop_node->bb->succs)
fefa31b5 3102 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)
ea1c67e6
VM
3103 && ((dest_loop_node = IRA_BB_NODE (e->dest)->parent)
3104 != loop_tree_node))
3105 fprintf (ira_dump_file, "(->%d:l%d)",
2608d841 3106 e->dest->index, dest_loop_node->loop_num);
ea1c67e6
VM
3107 }
3108 fprintf (ira_dump_file, "\n all:");
49d988e7 3109 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->all_allocnos, 0, j, bi)
058e97ec
VM
3110 fprintf (ira_dump_file, " %dr%d", j, ALLOCNO_REGNO (ira_allocnos[j]));
3111 fprintf (ira_dump_file, "\n modified regnos:");
3112 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->modified_regnos, 0, j, bi)
3113 fprintf (ira_dump_file, " %d", j);
3114 fprintf (ira_dump_file, "\n border:");
3115 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->border_allocnos, 0, j, bi)
3116 fprintf (ira_dump_file, " %dr%d", j, ALLOCNO_REGNO (ira_allocnos[j]));
3117 fprintf (ira_dump_file, "\n Pressure:");
1756cb66 3118 for (j = 0; (int) j < ira_pressure_classes_num; j++)
058e97ec 3119 {
1756cb66 3120 enum reg_class pclass;
b8698a0f 3121
1756cb66
VM
3122 pclass = ira_pressure_classes[j];
3123 if (loop_tree_node->reg_pressure[pclass] == 0)
058e97ec 3124 continue;
1756cb66
VM
3125 fprintf (ira_dump_file, " %s=%d", reg_class_names[pclass],
3126 loop_tree_node->reg_pressure[pclass]);
058e97ec
VM
3127 }
3128 fprintf (ira_dump_file, "\n");
3129}
3130
3131/* Color the allocnos inside loop (in the extreme case it can be all
3132 of the function) given the corresponding LOOP_TREE_NODE. The
3133 function is called for each loop during top-down traverse of the
3134 loop tree. */
3135static void
3136color_pass (ira_loop_tree_node_t loop_tree_node)
3137{
27508f5f 3138 int regno, hard_regno, index = -1, n;
058e97ec
VM
3139 int cost, exit_freq, enter_freq;
3140 unsigned int j;
3141 bitmap_iterator bi;
3142 enum machine_mode mode;
1756cb66 3143 enum reg_class rclass, aclass, pclass;
058e97ec
VM
3144 ira_allocno_t a, subloop_allocno;
3145 ira_loop_tree_node_t subloop_node;
3146
3147 ira_assert (loop_tree_node->bb == NULL);
3148 if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL)
3149 print_loop_title (loop_tree_node);
3150
49d988e7 3151 bitmap_copy (coloring_allocno_bitmap, loop_tree_node->all_allocnos);
058e97ec 3152 bitmap_copy (consideration_allocno_bitmap, coloring_allocno_bitmap);
27508f5f 3153 n = 0;
1756cb66
VM
3154 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
3155 {
3156 a = ira_allocnos[j];
3157 n++;
1756cb66
VM
3158 if (! ALLOCNO_ASSIGNED_P (a))
3159 continue;
3160 bitmap_clear_bit (coloring_allocno_bitmap, ALLOCNO_NUM (a));
3161 }
3162 allocno_color_data
3163 = (allocno_color_data_t) ira_allocate (sizeof (struct allocno_color_data)
3164 * n);
3165 memset (allocno_color_data, 0, sizeof (struct allocno_color_data) * n);
27508f5f
VM
3166 curr_allocno_process = 0;
3167 n = 0;
058e97ec
VM
3168 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
3169 {
3170 a = ira_allocnos[j];
1756cb66
VM
3171 ALLOCNO_ADD_DATA (a) = allocno_color_data + n;
3172 n++;
058e97ec 3173 }
bf08fb16 3174 init_allocno_threads ();
058e97ec
VM
3175 /* Color all mentioned allocnos including transparent ones. */
3176 color_allocnos ();
3177 /* Process caps. They are processed just once. */
7db7ed3c
VM
3178 if (flag_ira_region == IRA_REGION_MIXED
3179 || flag_ira_region == IRA_REGION_ALL)
49d988e7 3180 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->all_allocnos, 0, j, bi)
058e97ec
VM
3181 {
3182 a = ira_allocnos[j];
3183 if (ALLOCNO_CAP_MEMBER (a) == NULL)
3184 continue;
3185 /* Remove from processing in the next loop. */
3186 bitmap_clear_bit (consideration_allocno_bitmap, j);
1756cb66
VM
3187 rclass = ALLOCNO_CLASS (a);
3188 pclass = ira_pressure_class_translate[rclass];
7db7ed3c 3189 if (flag_ira_region == IRA_REGION_MIXED
1756cb66 3190 && (loop_tree_node->reg_pressure[pclass]
f508f827 3191 <= ira_class_hard_regs_num[pclass]))
058e97ec
VM
3192 {
3193 mode = ALLOCNO_MODE (a);
3194 hard_regno = ALLOCNO_HARD_REGNO (a);
3195 if (hard_regno >= 0)
3196 {
3197 index = ira_class_hard_reg_index[rclass][hard_regno];
3198 ira_assert (index >= 0);
3199 }
3200 regno = ALLOCNO_REGNO (a);
3201 subloop_allocno = ALLOCNO_CAP_MEMBER (a);
3202 subloop_node = ALLOCNO_LOOP_TREE_NODE (subloop_allocno);
3203 ira_assert (!ALLOCNO_ASSIGNED_P (subloop_allocno));
3204 ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno;
3205 ALLOCNO_ASSIGNED_P (subloop_allocno) = true;
3206 if (hard_regno >= 0)
c73ccc80 3207 update_costs_from_copies (subloop_allocno, true, true);
058e97ec
VM
3208 /* We don't need updated costs anymore: */
3209 ira_free_allocno_updated_costs (subloop_allocno);
3210 }
3211 }
3212 /* Update costs of the corresponding allocnos (not caps) in the
3213 subloops. */
3214 for (subloop_node = loop_tree_node->subloops;
3215 subloop_node != NULL;
3216 subloop_node = subloop_node->subloop_next)
3217 {
3218 ira_assert (subloop_node->bb == NULL);
3219 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
3220 {
3221 a = ira_allocnos[j];
3222 ira_assert (ALLOCNO_CAP_MEMBER (a) == NULL);
3223 mode = ALLOCNO_MODE (a);
1756cb66
VM
3224 rclass = ALLOCNO_CLASS (a);
3225 pclass = ira_pressure_class_translate[rclass];
058e97ec 3226 hard_regno = ALLOCNO_HARD_REGNO (a);
7db7ed3c 3227 /* Use hard register class here. ??? */
058e97ec
VM
3228 if (hard_regno >= 0)
3229 {
3230 index = ira_class_hard_reg_index[rclass][hard_regno];
3231 ira_assert (index >= 0);
3232 }
3233 regno = ALLOCNO_REGNO (a);
3234 /* ??? conflict costs */
3235 subloop_allocno = subloop_node->regno_allocno_map[regno];
3236 if (subloop_allocno == NULL
3237 || ALLOCNO_CAP (subloop_allocno) != NULL)
3238 continue;
1756cb66 3239 ira_assert (ALLOCNO_CLASS (subloop_allocno) == rclass);
49d988e7
VM
3240 ira_assert (bitmap_bit_p (subloop_node->all_allocnos,
3241 ALLOCNO_NUM (subloop_allocno)));
7db7ed3c 3242 if ((flag_ira_region == IRA_REGION_MIXED)
1756cb66 3243 && (loop_tree_node->reg_pressure[pclass]
f508f827 3244 <= ira_class_hard_regs_num[pclass]))
058e97ec
VM
3245 {
3246 if (! ALLOCNO_ASSIGNED_P (subloop_allocno))
3247 {
3248 ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno;
3249 ALLOCNO_ASSIGNED_P (subloop_allocno) = true;
3250 if (hard_regno >= 0)
c73ccc80 3251 update_costs_from_copies (subloop_allocno, true, true);
058e97ec
VM
3252 /* We don't need updated costs anymore: */
3253 ira_free_allocno_updated_costs (subloop_allocno);
3254 }
3255 continue;
3256 }
3257 exit_freq = ira_loop_edge_freq (subloop_node, regno, true);
3258 enter_freq = ira_loop_edge_freq (subloop_node, regno, false);
3259 ira_assert (regno < ira_reg_equiv_len);
55a2c322 3260 if (ira_equiv_no_lvalue_p (regno))
058e97ec
VM
3261 {
3262 if (! ALLOCNO_ASSIGNED_P (subloop_allocno))
3263 {
3264 ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno;
3265 ALLOCNO_ASSIGNED_P (subloop_allocno) = true;
3266 if (hard_regno >= 0)
c73ccc80 3267 update_costs_from_copies (subloop_allocno, true, true);
058e97ec
VM
3268 /* We don't need updated costs anymore: */
3269 ira_free_allocno_updated_costs (subloop_allocno);
3270 }
3271 }
3272 else if (hard_regno < 0)
3273 {
3274 ALLOCNO_UPDATED_MEMORY_COST (subloop_allocno)
3275 -= ((ira_memory_move_cost[mode][rclass][1] * enter_freq)
3276 + (ira_memory_move_cost[mode][rclass][0] * exit_freq));
3277 }
3278 else
3279 {
1756cb66
VM
3280 aclass = ALLOCNO_CLASS (subloop_allocno);
3281 ira_init_register_move_cost_if_necessary (mode);
3282 cost = (ira_register_move_cost[mode][rclass][rclass]
058e97ec 3283 * (exit_freq + enter_freq));
cb1ca6ac 3284 ira_allocate_and_set_or_copy_costs
1756cb66
VM
3285 (&ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno), aclass,
3286 ALLOCNO_UPDATED_CLASS_COST (subloop_allocno),
cb1ca6ac
VM
3287 ALLOCNO_HARD_REG_COSTS (subloop_allocno));
3288 ira_allocate_and_set_or_copy_costs
3289 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (subloop_allocno),
1756cb66 3290 aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (subloop_allocno));
cb1ca6ac
VM
3291 ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index] -= cost;
3292 ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (subloop_allocno)[index]
058e97ec 3293 -= cost;
1756cb66 3294 if (ALLOCNO_UPDATED_CLASS_COST (subloop_allocno)
cb1ca6ac 3295 > ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index])
1756cb66 3296 ALLOCNO_UPDATED_CLASS_COST (subloop_allocno)
cb1ca6ac 3297 = ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index];
058e97ec
VM
3298 ALLOCNO_UPDATED_MEMORY_COST (subloop_allocno)
3299 += (ira_memory_move_cost[mode][rclass][0] * enter_freq
3300 + ira_memory_move_cost[mode][rclass][1] * exit_freq);
058e97ec
VM
3301 }
3302 }
3303 }
1756cb66 3304 ira_free (allocno_color_data);
bf08fb16 3305 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
1756cb66
VM
3306 {
3307 a = ira_allocnos[j];
3308 ALLOCNO_ADD_DATA (a) = NULL;
1756cb66 3309 }
058e97ec
VM
3310}
3311
3312/* Initialize the common data for coloring and calls functions to do
3313 Chaitin-Briggs and regional coloring. */
3314static void
3315do_coloring (void)
3316{
3317 coloring_allocno_bitmap = ira_allocate_bitmap ();
058e97ec
VM
3318 if (internal_flag_ira_verbose > 0 && ira_dump_file != NULL)
3319 fprintf (ira_dump_file, "\n**** Allocnos coloring:\n\n");
b8698a0f 3320
058e97ec
VM
3321 ira_traverse_loop_tree (false, ira_loop_tree_root, color_pass, NULL);
3322
3323 if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL)
3324 ira_print_disposition (ira_dump_file);
3325
058e97ec 3326 ira_free_bitmap (coloring_allocno_bitmap);
058e97ec
VM
3327}
3328
3329\f
3330
3331/* Move spill/restore code, which are to be generated in ira-emit.c,
3332 to less frequent points (if it is profitable) by reassigning some
3333 allocnos (in loop with subloops containing in another loop) to
3334 memory which results in longer live-range where the corresponding
3335 pseudo-registers will be in memory. */
3336static void
3337move_spill_restore (void)
3338{
3339 int cost, regno, hard_regno, hard_regno2, index;
3340 bool changed_p;
3341 int enter_freq, exit_freq;
3342 enum machine_mode mode;
3343 enum reg_class rclass;
3344 ira_allocno_t a, parent_allocno, subloop_allocno;
3345 ira_loop_tree_node_t parent, loop_node, subloop_node;
3346 ira_allocno_iterator ai;
3347
3348 for (;;)
3349 {
3350 changed_p = false;
3351 if (internal_flag_ira_verbose > 0 && ira_dump_file != NULL)
3352 fprintf (ira_dump_file, "New iteration of spill/restore move\n");
3353 FOR_EACH_ALLOCNO (a, ai)
3354 {
3355 regno = ALLOCNO_REGNO (a);
3356 loop_node = ALLOCNO_LOOP_TREE_NODE (a);
3357 if (ALLOCNO_CAP_MEMBER (a) != NULL
3358 || ALLOCNO_CAP (a) != NULL
3359 || (hard_regno = ALLOCNO_HARD_REGNO (a)) < 0
3360 || loop_node->children == NULL
3361 /* don't do the optimization because it can create
3362 copies and the reload pass can spill the allocno set
3363 by copy although the allocno will not get memory
3364 slot. */
55a2c322 3365 || ira_equiv_no_lvalue_p (regno)
058e97ec
VM
3366 || !bitmap_bit_p (loop_node->border_allocnos, ALLOCNO_NUM (a)))
3367 continue;
3368 mode = ALLOCNO_MODE (a);
1756cb66 3369 rclass = ALLOCNO_CLASS (a);
058e97ec
VM
3370 index = ira_class_hard_reg_index[rclass][hard_regno];
3371 ira_assert (index >= 0);
3372 cost = (ALLOCNO_MEMORY_COST (a)
3373 - (ALLOCNO_HARD_REG_COSTS (a) == NULL
1756cb66 3374 ? ALLOCNO_CLASS_COST (a)
058e97ec 3375 : ALLOCNO_HARD_REG_COSTS (a)[index]));
1756cb66 3376 ira_init_register_move_cost_if_necessary (mode);
058e97ec
VM
3377 for (subloop_node = loop_node->subloops;
3378 subloop_node != NULL;
3379 subloop_node = subloop_node->subloop_next)
3380 {
3381 ira_assert (subloop_node->bb == NULL);
3382 subloop_allocno = subloop_node->regno_allocno_map[regno];
3383 if (subloop_allocno == NULL)
3384 continue;
1756cb66 3385 ira_assert (rclass == ALLOCNO_CLASS (subloop_allocno));
058e97ec
VM
3386 /* We have accumulated cost. To get the real cost of
3387 allocno usage in the loop we should subtract costs of
3388 the subloop allocnos. */
3389 cost -= (ALLOCNO_MEMORY_COST (subloop_allocno)
3390 - (ALLOCNO_HARD_REG_COSTS (subloop_allocno) == NULL
1756cb66 3391 ? ALLOCNO_CLASS_COST (subloop_allocno)
058e97ec
VM
3392 : ALLOCNO_HARD_REG_COSTS (subloop_allocno)[index]));
3393 exit_freq = ira_loop_edge_freq (subloop_node, regno, true);
3394 enter_freq = ira_loop_edge_freq (subloop_node, regno, false);
3395 if ((hard_regno2 = ALLOCNO_HARD_REGNO (subloop_allocno)) < 0)
3396 cost -= (ira_memory_move_cost[mode][rclass][0] * exit_freq
3397 + ira_memory_move_cost[mode][rclass][1] * enter_freq);
3398 else
3399 {
3400 cost
3401 += (ira_memory_move_cost[mode][rclass][0] * exit_freq
3402 + ira_memory_move_cost[mode][rclass][1] * enter_freq);
3403 if (hard_regno2 != hard_regno)
1756cb66 3404 cost -= (ira_register_move_cost[mode][rclass][rclass]
058e97ec
VM
3405 * (exit_freq + enter_freq));
3406 }
3407 }
3408 if ((parent = loop_node->parent) != NULL
3409 && (parent_allocno = parent->regno_allocno_map[regno]) != NULL)
3410 {
1756cb66 3411 ira_assert (rclass == ALLOCNO_CLASS (parent_allocno));
058e97ec
VM
3412 exit_freq = ira_loop_edge_freq (loop_node, regno, true);
3413 enter_freq = ira_loop_edge_freq (loop_node, regno, false);
3414 if ((hard_regno2 = ALLOCNO_HARD_REGNO (parent_allocno)) < 0)
3415 cost -= (ira_memory_move_cost[mode][rclass][0] * exit_freq
3416 + ira_memory_move_cost[mode][rclass][1] * enter_freq);
3417 else
3418 {
3419 cost
3420 += (ira_memory_move_cost[mode][rclass][1] * exit_freq
3421 + ira_memory_move_cost[mode][rclass][0] * enter_freq);
3422 if (hard_regno2 != hard_regno)
1756cb66 3423 cost -= (ira_register_move_cost[mode][rclass][rclass]
058e97ec
VM
3424 * (exit_freq + enter_freq));
3425 }
3426 }
3427 if (cost < 0)
3428 {
3429 ALLOCNO_HARD_REGNO (a) = -1;
3430 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3431 {
3432 fprintf
3433 (ira_dump_file,
3434 " Moving spill/restore for a%dr%d up from loop %d",
2608d841 3435 ALLOCNO_NUM (a), regno, loop_node->loop_num);
058e97ec
VM
3436 fprintf (ira_dump_file, " - profit %d\n", -cost);
3437 }
3438 changed_p = true;
3439 }
3440 }
3441 if (! changed_p)
3442 break;
3443 }
3444}
3445
3446\f
3447
3448/* Update current hard reg costs and current conflict hard reg costs
3449 for allocno A. It is done by processing its copies containing
3450 other allocnos already assigned. */
3451static void
3452update_curr_costs (ira_allocno_t a)
3453{
3454 int i, hard_regno, cost;
3455 enum machine_mode mode;
1756cb66 3456 enum reg_class aclass, rclass;
058e97ec
VM
3457 ira_allocno_t another_a;
3458 ira_copy_t cp, next_cp;
3459
bdf0eb06 3460 ira_free_allocno_updated_costs (a);
058e97ec 3461 ira_assert (! ALLOCNO_ASSIGNED_P (a));
1756cb66
VM
3462 aclass = ALLOCNO_CLASS (a);
3463 if (aclass == NO_REGS)
058e97ec
VM
3464 return;
3465 mode = ALLOCNO_MODE (a);
1756cb66 3466 ira_init_register_move_cost_if_necessary (mode);
058e97ec
VM
3467 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
3468 {
3469 if (cp->first == a)
3470 {
3471 next_cp = cp->next_first_allocno_copy;
3472 another_a = cp->second;
3473 }
3474 else if (cp->second == a)
3475 {
3476 next_cp = cp->next_second_allocno_copy;
3477 another_a = cp->first;
3478 }
3479 else
3480 gcc_unreachable ();
1756cb66 3481 if (! ira_reg_classes_intersect_p[aclass][ALLOCNO_CLASS (another_a)]
058e97ec
VM
3482 || ! ALLOCNO_ASSIGNED_P (another_a)
3483 || (hard_regno = ALLOCNO_HARD_REGNO (another_a)) < 0)
3484 continue;
3485 rclass = REGNO_REG_CLASS (hard_regno);
1756cb66 3486 i = ira_class_hard_reg_index[aclass][hard_regno];
7db7ed3c
VM
3487 if (i < 0)
3488 continue;
058e97ec 3489 cost = (cp->first == a
1756cb66
VM
3490 ? ira_register_move_cost[mode][rclass][aclass]
3491 : ira_register_move_cost[mode][aclass][rclass]);
058e97ec 3492 ira_allocate_and_set_or_copy_costs
1756cb66 3493 (&ALLOCNO_UPDATED_HARD_REG_COSTS (a), aclass, ALLOCNO_CLASS_COST (a),
058e97ec
VM
3494 ALLOCNO_HARD_REG_COSTS (a));
3495 ira_allocate_and_set_or_copy_costs
3496 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a),
1756cb66 3497 aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (a));
058e97ec
VM
3498 ALLOCNO_UPDATED_HARD_REG_COSTS (a)[i] -= cp->freq * cost;
3499 ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a)[i] -= cp->freq * cost;
3500 }
3501}
3502
058e97ec
VM
3503/* Try to assign hard registers to the unassigned allocnos and
3504 allocnos conflicting with them or conflicting with allocnos whose
3505 regno >= START_REGNO. The function is called after ira_flattening,
3506 so more allocnos (including ones created in ira-emit.c) will have a
3507 chance to get a hard register. We use simple assignment algorithm
3508 based on priorities. */
3509void
3510ira_reassign_conflict_allocnos (int start_regno)
3511{
3512 int i, allocnos_to_color_num;
fa86d337 3513 ira_allocno_t a;
1756cb66 3514 enum reg_class aclass;
058e97ec
VM
3515 bitmap allocnos_to_color;
3516 ira_allocno_iterator ai;
3517
3518 allocnos_to_color = ira_allocate_bitmap ();
3519 allocnos_to_color_num = 0;
3520 FOR_EACH_ALLOCNO (a, ai)
3521 {
ac0ab4f7 3522 int n = ALLOCNO_NUM_OBJECTS (a);
fa86d337 3523
058e97ec
VM
3524 if (! ALLOCNO_ASSIGNED_P (a)
3525 && ! bitmap_bit_p (allocnos_to_color, ALLOCNO_NUM (a)))
3526 {
1756cb66 3527 if (ALLOCNO_CLASS (a) != NO_REGS)
058e97ec
VM
3528 sorted_allocnos[allocnos_to_color_num++] = a;
3529 else
3530 {
3531 ALLOCNO_ASSIGNED_P (a) = true;
3532 ALLOCNO_HARD_REGNO (a) = -1;
3533 ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL);
3534 ira_assert (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a) == NULL);
3535 }
3536 bitmap_set_bit (allocnos_to_color, ALLOCNO_NUM (a));
3537 }
3538 if (ALLOCNO_REGNO (a) < start_regno
1756cb66 3539 || (aclass = ALLOCNO_CLASS (a)) == NO_REGS)
058e97ec 3540 continue;
ac0ab4f7 3541 for (i = 0; i < n; i++)
058e97ec 3542 {
ac0ab4f7
BS
3543 ira_object_t obj = ALLOCNO_OBJECT (a, i);
3544 ira_object_t conflict_obj;
3545 ira_object_conflict_iterator oci;
1756cb66 3546
ac0ab4f7
BS
3547 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
3548 {
3549 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
1756cb66 3550
ac0ab4f7 3551 ira_assert (ira_reg_classes_intersect_p
1756cb66 3552 [aclass][ALLOCNO_CLASS (conflict_a)]);
fcaa4ca4 3553 if (!bitmap_set_bit (allocnos_to_color, ALLOCNO_NUM (conflict_a)))
ac0ab4f7 3554 continue;
ac0ab4f7
BS
3555 sorted_allocnos[allocnos_to_color_num++] = conflict_a;
3556 }
058e97ec
VM
3557 }
3558 }
3559 ira_free_bitmap (allocnos_to_color);
3560 if (allocnos_to_color_num > 1)
3561 {
1ae64b0f 3562 setup_allocno_priorities (sorted_allocnos, allocnos_to_color_num);
058e97ec
VM
3563 qsort (sorted_allocnos, allocnos_to_color_num, sizeof (ira_allocno_t),
3564 allocno_priority_compare_func);
3565 }
3566 for (i = 0; i < allocnos_to_color_num; i++)
3567 {
3568 a = sorted_allocnos[i];
3569 ALLOCNO_ASSIGNED_P (a) = false;
058e97ec
VM
3570 update_curr_costs (a);
3571 }
3572 for (i = 0; i < allocnos_to_color_num; i++)
3573 {
3574 a = sorted_allocnos[i];
3575 if (assign_hard_reg (a, true))
3576 {
3577 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3578 fprintf
3579 (ira_dump_file,
3580 " Secondary allocation: assign hard reg %d to reg %d\n",
3581 ALLOCNO_HARD_REGNO (a), ALLOCNO_REGNO (a));
3582 }
3583 }
3584}
3585
3586\f
3587
1756cb66
VM
3588/* This page contains functions used to find conflicts using allocno
3589 live ranges. */
3590
1756cb66
VM
3591#ifdef ENABLE_IRA_CHECKING
3592
3593/* Return TRUE if live ranges of pseudo-registers REGNO1 and REGNO2
3594 intersect. This should be used when there is only one region.
3595 Currently this is used during reload. */
3596static bool
3597conflict_by_live_ranges_p (int regno1, int regno2)
3598{
3599 ira_allocno_t a1, a2;
3600
3601 ira_assert (regno1 >= FIRST_PSEUDO_REGISTER
3602 && regno2 >= FIRST_PSEUDO_REGISTER);
3603 /* Reg info caclulated by dataflow infrastructure can be different
3604 from one calculated by regclass. */
3605 if ((a1 = ira_loop_tree_root->regno_allocno_map[regno1]) == NULL
3606 || (a2 = ira_loop_tree_root->regno_allocno_map[regno2]) == NULL)
3607 return false;
3608 return allocnos_conflict_by_live_ranges_p (a1, a2);
3609}
3610
3611#endif
3612
3613\f
3614
058e97ec
VM
3615/* This page contains code to coalesce memory stack slots used by
3616 spilled allocnos. This results in smaller stack frame, better data
3617 locality, and in smaller code for some architectures like
3618 x86/x86_64 where insn size depends on address displacement value.
3619 On the other hand, it can worsen insn scheduling after the RA but
3620 in practice it is less important than smaller stack frames. */
3621
22b0982c
VM
3622/* TRUE if we coalesced some allocnos. In other words, if we got
3623 loops formed by members first_coalesced_allocno and
3624 next_coalesced_allocno containing more one allocno. */
3625static bool allocno_coalesced_p;
3626
3627/* Bitmap used to prevent a repeated allocno processing because of
3628 coalescing. */
3629static bitmap processed_coalesced_allocno_bitmap;
3630
1756cb66
VM
3631/* See below. */
3632typedef struct coalesce_data *coalesce_data_t;
3633
3634/* To decrease footprint of ira_allocno structure we store all data
3635 needed only for coalescing in the following structure. */
3636struct coalesce_data
3637{
3638 /* Coalesced allocnos form a cyclic list. One allocno given by
3639 FIRST represents all coalesced allocnos. The
3640 list is chained by NEXT. */
3641 ira_allocno_t first;
3642 ira_allocno_t next;
3643 int temp;
3644};
3645
3646/* Container for storing allocno data concerning coalescing. */
3647static coalesce_data_t allocno_coalesce_data;
3648
3649/* Macro to access the data concerning coalescing. */
3650#define ALLOCNO_COALESCE_DATA(a) ((coalesce_data_t) ALLOCNO_ADD_DATA (a))
3651
22b0982c
VM
3652/* Merge two sets of coalesced allocnos given correspondingly by
3653 allocnos A1 and A2 (more accurately merging A2 set into A1
3654 set). */
3655static void
3656merge_allocnos (ira_allocno_t a1, ira_allocno_t a2)
3657{
3658 ira_allocno_t a, first, last, next;
3659
1756cb66
VM
3660 first = ALLOCNO_COALESCE_DATA (a1)->first;
3661 a = ALLOCNO_COALESCE_DATA (a2)->first;
3662 if (first == a)
22b0982c 3663 return;
1756cb66
VM
3664 for (last = a2, a = ALLOCNO_COALESCE_DATA (a2)->next;;
3665 a = ALLOCNO_COALESCE_DATA (a)->next)
22b0982c 3666 {
1756cb66 3667 ALLOCNO_COALESCE_DATA (a)->first = first;
22b0982c
VM
3668 if (a == a2)
3669 break;
3670 last = a;
3671 }
1756cb66
VM
3672 next = allocno_coalesce_data[ALLOCNO_NUM (first)].next;
3673 allocno_coalesce_data[ALLOCNO_NUM (first)].next = a2;
3674 allocno_coalesce_data[ALLOCNO_NUM (last)].next = next;
22b0982c
VM
3675}
3676
1756cb66
VM
3677/* Return TRUE if there are conflicting allocnos from two sets of
3678 coalesced allocnos given correspondingly by allocnos A1 and A2. We
3679 use live ranges to find conflicts because conflicts are represented
3680 only for allocnos of the same allocno class and during the reload
3681 pass we coalesce allocnos for sharing stack memory slots. */
22b0982c
VM
3682static bool
3683coalesced_allocno_conflict_p (ira_allocno_t a1, ira_allocno_t a2)
3684{
1756cb66 3685 ira_allocno_t a, conflict_a;
22b0982c 3686
22b0982c
VM
3687 if (allocno_coalesced_p)
3688 {
1756cb66
VM
3689 bitmap_clear (processed_coalesced_allocno_bitmap);
3690 for (a = ALLOCNO_COALESCE_DATA (a1)->next;;
3691 a = ALLOCNO_COALESCE_DATA (a)->next)
22b0982c 3692 {
1756cb66 3693 bitmap_set_bit (processed_coalesced_allocno_bitmap, ALLOCNO_NUM (a));
22b0982c
VM
3694 if (a == a1)
3695 break;
3696 }
3697 }
1756cb66
VM
3698 for (a = ALLOCNO_COALESCE_DATA (a2)->next;;
3699 a = ALLOCNO_COALESCE_DATA (a)->next)
22b0982c 3700 {
1756cb66
VM
3701 for (conflict_a = ALLOCNO_COALESCE_DATA (a1)->next;;
3702 conflict_a = ALLOCNO_COALESCE_DATA (conflict_a)->next)
22b0982c 3703 {
1756cb66 3704 if (allocnos_conflict_by_live_ranges_p (a, conflict_a))
22b0982c 3705 return true;
1756cb66 3706 if (conflict_a == a1)
22b0982c
VM
3707 break;
3708 }
22b0982c
VM
3709 if (a == a2)
3710 break;
3711 }
3712 return false;
3713}
3714
3715/* The major function for aggressive allocno coalescing. We coalesce
3716 only spilled allocnos. If some allocnos have been coalesced, we
3717 set up flag allocno_coalesced_p. */
3718static void
3719coalesce_allocnos (void)
3720{
3721 ira_allocno_t a;
bf08fb16 3722 ira_copy_t cp, next_cp;
22b0982c
VM
3723 unsigned int j;
3724 int i, n, cp_num, regno;
3725 bitmap_iterator bi;
3726
22b0982c
VM
3727 cp_num = 0;
3728 /* Collect copies. */
3729 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, j, bi)
3730 {
3731 a = ira_allocnos[j];
3732 regno = ALLOCNO_REGNO (a);
3733 if (! ALLOCNO_ASSIGNED_P (a) || ALLOCNO_HARD_REGNO (a) >= 0
55a2c322 3734 || ira_equiv_no_lvalue_p (regno))
22b0982c
VM
3735 continue;
3736 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
3737 {
3738 if (cp->first == a)
3739 {
3740 next_cp = cp->next_first_allocno_copy;
3741 regno = ALLOCNO_REGNO (cp->second);
3742 /* For priority coloring we coalesce allocnos only with
1756cb66 3743 the same allocno class not with intersected allocno
22b0982c
VM
3744 classes as it were possible. It is done for
3745 simplicity. */
3746 if ((cp->insn != NULL || cp->constraint_p)
3747 && ALLOCNO_ASSIGNED_P (cp->second)
3748 && ALLOCNO_HARD_REGNO (cp->second) < 0
55a2c322 3749 && ! ira_equiv_no_lvalue_p (regno))
22b0982c
VM
3750 sorted_copies[cp_num++] = cp;
3751 }
3752 else if (cp->second == a)
3753 next_cp = cp->next_second_allocno_copy;
3754 else
3755 gcc_unreachable ();
3756 }
3757 }
3758 qsort (sorted_copies, cp_num, sizeof (ira_copy_t), copy_freq_compare_func);
3759 /* Coalesced copies, most frequently executed first. */
3760 for (; cp_num != 0;)
3761 {
3762 for (i = 0; i < cp_num; i++)
3763 {
3764 cp = sorted_copies[i];
3765 if (! coalesced_allocno_conflict_p (cp->first, cp->second))
3766 {
3767 allocno_coalesced_p = true;
3768 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3769 fprintf
3770 (ira_dump_file,
3771 " Coalescing copy %d:a%dr%d-a%dr%d (freq=%d)\n",
3772 cp->num, ALLOCNO_NUM (cp->first), ALLOCNO_REGNO (cp->first),
3773 ALLOCNO_NUM (cp->second), ALLOCNO_REGNO (cp->second),
3774 cp->freq);
3775 merge_allocnos (cp->first, cp->second);
3776 i++;
3777 break;
3778 }
3779 }
3780 /* Collect the rest of copies. */
3781 for (n = 0; i < cp_num; i++)
3782 {
3783 cp = sorted_copies[i];
1756cb66
VM
3784 if (allocno_coalesce_data[ALLOCNO_NUM (cp->first)].first
3785 != allocno_coalesce_data[ALLOCNO_NUM (cp->second)].first)
22b0982c
VM
3786 sorted_copies[n++] = cp;
3787 }
3788 cp_num = n;
3789 }
22b0982c
VM
3790}
3791
058e97ec
VM
3792/* Usage cost and order number of coalesced allocno set to which
3793 given pseudo register belongs to. */
3794static int *regno_coalesced_allocno_cost;
3795static int *regno_coalesced_allocno_num;
3796
3797/* Sort pseudos according frequencies of coalesced allocno sets they
3798 belong to (putting most frequently ones first), and according to
3799 coalesced allocno set order numbers. */
3800static int
3801coalesced_pseudo_reg_freq_compare (const void *v1p, const void *v2p)
3802{
3803 const int regno1 = *(const int *) v1p;
3804 const int regno2 = *(const int *) v2p;
3805 int diff;
3806
3807 if ((diff = (regno_coalesced_allocno_cost[regno2]
3808 - regno_coalesced_allocno_cost[regno1])) != 0)
3809 return diff;
3810 if ((diff = (regno_coalesced_allocno_num[regno1]
3811 - regno_coalesced_allocno_num[regno2])) != 0)
3812 return diff;
3813 return regno1 - regno2;
3814}
3815
3816/* Widest width in which each pseudo reg is referred to (via subreg).
3817 It is used for sorting pseudo registers. */
3818static unsigned int *regno_max_ref_width;
3819
3820/* Redefine STACK_GROWS_DOWNWARD in terms of 0 or 1. */
3821#ifdef STACK_GROWS_DOWNWARD
3822# undef STACK_GROWS_DOWNWARD
3823# define STACK_GROWS_DOWNWARD 1
3824#else
3825# define STACK_GROWS_DOWNWARD 0
3826#endif
3827
3828/* Sort pseudos according their slot numbers (putting ones with
3829 smaller numbers first, or last when the frame pointer is not
3830 needed). */
3831static int
3832coalesced_pseudo_reg_slot_compare (const void *v1p, const void *v2p)
3833{
3834 const int regno1 = *(const int *) v1p;
3835 const int regno2 = *(const int *) v2p;
3836 ira_allocno_t a1 = ira_regno_allocno_map[regno1];
3837 ira_allocno_t a2 = ira_regno_allocno_map[regno2];
3838 int diff, slot_num1, slot_num2;
3839 int total_size1, total_size2;
3840
3841 if (a1 == NULL || ALLOCNO_HARD_REGNO (a1) >= 0)
3842 {
3843 if (a2 == NULL || ALLOCNO_HARD_REGNO (a2) >= 0)
004a6ce8 3844 return regno1 - regno2;
058e97ec
VM
3845 return 1;
3846 }
3847 else if (a2 == NULL || ALLOCNO_HARD_REGNO (a2) >= 0)
3848 return -1;
3849 slot_num1 = -ALLOCNO_HARD_REGNO (a1);
3850 slot_num2 = -ALLOCNO_HARD_REGNO (a2);
3851 if ((diff = slot_num1 - slot_num2) != 0)
3852 return (frame_pointer_needed
3853 || !FRAME_GROWS_DOWNWARD == STACK_GROWS_DOWNWARD ? diff : -diff);
1756cb66
VM
3854 total_size1 = MAX (PSEUDO_REGNO_BYTES (regno1),
3855 regno_max_ref_width[regno1]);
3856 total_size2 = MAX (PSEUDO_REGNO_BYTES (regno2),
3857 regno_max_ref_width[regno2]);
058e97ec
VM
3858 if ((diff = total_size2 - total_size1) != 0)
3859 return diff;
004a6ce8 3860 return regno1 - regno2;
058e97ec
VM
3861}
3862
3863/* Setup REGNO_COALESCED_ALLOCNO_COST and REGNO_COALESCED_ALLOCNO_NUM
3864 for coalesced allocno sets containing allocnos with their regnos
3865 given in array PSEUDO_REGNOS of length N. */
3866static void
3867setup_coalesced_allocno_costs_and_nums (int *pseudo_regnos, int n)
3868{
3869 int i, num, regno, cost;
3870 ira_allocno_t allocno, a;
3871
3872 for (num = i = 0; i < n; i++)
3873 {
3874 regno = pseudo_regnos[i];
3875 allocno = ira_regno_allocno_map[regno];
3876 if (allocno == NULL)
3877 {
3878 regno_coalesced_allocno_cost[regno] = 0;
3879 regno_coalesced_allocno_num[regno] = ++num;
3880 continue;
3881 }
1756cb66 3882 if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno)
058e97ec
VM
3883 continue;
3884 num++;
1756cb66
VM
3885 for (cost = 0, a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3886 a = ALLOCNO_COALESCE_DATA (a)->next)
058e97ec
VM
3887 {
3888 cost += ALLOCNO_FREQ (a);
3889 if (a == allocno)
3890 break;
3891 }
1756cb66
VM
3892 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3893 a = ALLOCNO_COALESCE_DATA (a)->next)
058e97ec
VM
3894 {
3895 regno_coalesced_allocno_num[ALLOCNO_REGNO (a)] = num;
3896 regno_coalesced_allocno_cost[ALLOCNO_REGNO (a)] = cost;
3897 if (a == allocno)
3898 break;
3899 }
3900 }
3901}
3902
3903/* Collect spilled allocnos representing coalesced allocno sets (the
3904 first coalesced allocno). The collected allocnos are returned
3905 through array SPILLED_COALESCED_ALLOCNOS. The function returns the
3906 number of the collected allocnos. The allocnos are given by their
3907 regnos in array PSEUDO_REGNOS of length N. */
3908static int
3909collect_spilled_coalesced_allocnos (int *pseudo_regnos, int n,
3910 ira_allocno_t *spilled_coalesced_allocnos)
3911{
3912 int i, num, regno;
3913 ira_allocno_t allocno;
3914
3915 for (num = i = 0; i < n; i++)
3916 {
3917 regno = pseudo_regnos[i];
3918 allocno = ira_regno_allocno_map[regno];
3919 if (allocno == NULL || ALLOCNO_HARD_REGNO (allocno) >= 0
1756cb66 3920 || ALLOCNO_COALESCE_DATA (allocno)->first != allocno)
058e97ec
VM
3921 continue;
3922 spilled_coalesced_allocnos[num++] = allocno;
3923 }
3924 return num;
3925}
3926
3553f0bb
VM
3927/* Array of live ranges of size IRA_ALLOCNOS_NUM. Live range for
3928 given slot contains live ranges of coalesced allocnos assigned to
3929 given slot. */
b14151b5 3930static live_range_t *slot_coalesced_allocnos_live_ranges;
b15a7ae6 3931
3553f0bb
VM
3932/* Return TRUE if coalesced allocnos represented by ALLOCNO has live
3933 ranges intersected with live ranges of coalesced allocnos assigned
3934 to slot with number N. */
b15a7ae6 3935static bool
3553f0bb 3936slot_coalesced_allocno_live_ranges_intersect_p (ira_allocno_t allocno, int n)
b15a7ae6 3937{
b15a7ae6 3938 ira_allocno_t a;
b15a7ae6 3939
1756cb66
VM
3940 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3941 a = ALLOCNO_COALESCE_DATA (a)->next)
b15a7ae6 3942 {
ac0ab4f7
BS
3943 int i;
3944 int nr = ALLOCNO_NUM_OBJECTS (a);
1756cb66 3945
ac0ab4f7
BS
3946 for (i = 0; i < nr; i++)
3947 {
3948 ira_object_t obj = ALLOCNO_OBJECT (a, i);
1756cb66
VM
3949
3950 if (ira_live_ranges_intersect_p
3951 (slot_coalesced_allocnos_live_ranges[n],
3952 OBJECT_LIVE_RANGES (obj)))
ac0ab4f7
BS
3953 return true;
3954 }
b15a7ae6
VM
3955 if (a == allocno)
3956 break;
3957 }
3958 return false;
3959}
3960
3553f0bb
VM
3961/* Update live ranges of slot to which coalesced allocnos represented
3962 by ALLOCNO were assigned. */
b15a7ae6 3963static void
3553f0bb 3964setup_slot_coalesced_allocno_live_ranges (ira_allocno_t allocno)
b15a7ae6 3965{
ac0ab4f7 3966 int i, n;
b15a7ae6 3967 ira_allocno_t a;
b14151b5 3968 live_range_t r;
b15a7ae6 3969
1756cb66
VM
3970 n = ALLOCNO_COALESCE_DATA (allocno)->temp;
3971 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3972 a = ALLOCNO_COALESCE_DATA (a)->next)
b15a7ae6 3973 {
ac0ab4f7
BS
3974 int nr = ALLOCNO_NUM_OBJECTS (a);
3975 for (i = 0; i < nr; i++)
3976 {
3977 ira_object_t obj = ALLOCNO_OBJECT (a, i);
1756cb66 3978
ac0ab4f7
BS
3979 r = ira_copy_live_range_list (OBJECT_LIVE_RANGES (obj));
3980 slot_coalesced_allocnos_live_ranges[n]
3981 = ira_merge_live_ranges
1756cb66 3982 (slot_coalesced_allocnos_live_ranges[n], r);
ac0ab4f7 3983 }
b15a7ae6
VM
3984 if (a == allocno)
3985 break;
3986 }
3987}
3988
058e97ec
VM
3989/* We have coalesced allocnos involving in copies. Coalesce allocnos
3990 further in order to share the same memory stack slot. Allocnos
3991 representing sets of allocnos coalesced before the call are given
3992 in array SPILLED_COALESCED_ALLOCNOS of length NUM. Return TRUE if
3993 some allocnos were coalesced in the function. */
3994static bool
3995coalesce_spill_slots (ira_allocno_t *spilled_coalesced_allocnos, int num)
3996{
3553f0bb 3997 int i, j, n, last_coalesced_allocno_num;
058e97ec
VM
3998 ira_allocno_t allocno, a;
3999 bool merged_p = false;
1240d76e 4000 bitmap set_jump_crosses = regstat_get_setjmp_crosses ();
058e97ec 4001
3553f0bb 4002 slot_coalesced_allocnos_live_ranges
b14151b5 4003 = (live_range_t *) ira_allocate (sizeof (live_range_t) * ira_allocnos_num);
3553f0bb 4004 memset (slot_coalesced_allocnos_live_ranges, 0,
b14151b5 4005 sizeof (live_range_t) * ira_allocnos_num);
b15a7ae6 4006 last_coalesced_allocno_num = 0;
058e97ec
VM
4007 /* Coalesce non-conflicting spilled allocnos preferring most
4008 frequently used. */
4009 for (i = 0; i < num; i++)
4010 {
4011 allocno = spilled_coalesced_allocnos[i];
1756cb66 4012 if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno
1240d76e 4013 || bitmap_bit_p (set_jump_crosses, ALLOCNO_REGNO (allocno))
55a2c322 4014 || ira_equiv_no_lvalue_p (ALLOCNO_REGNO (allocno)))
058e97ec
VM
4015 continue;
4016 for (j = 0; j < i; j++)
4017 {
4018 a = spilled_coalesced_allocnos[j];
1756cb66
VM
4019 n = ALLOCNO_COALESCE_DATA (a)->temp;
4020 if (ALLOCNO_COALESCE_DATA (a)->first == a
1240d76e 4021 && ! bitmap_bit_p (set_jump_crosses, ALLOCNO_REGNO (a))
55a2c322 4022 && ! ira_equiv_no_lvalue_p (ALLOCNO_REGNO (a))
3553f0bb 4023 && ! slot_coalesced_allocno_live_ranges_intersect_p (allocno, n))
b15a7ae6
VM
4024 break;
4025 }
4026 if (j >= i)
4027 {
4028 /* No coalescing: set up number for coalesced allocnos
4029 represented by ALLOCNO. */
1756cb66 4030 ALLOCNO_COALESCE_DATA (allocno)->temp = last_coalesced_allocno_num++;
3553f0bb 4031 setup_slot_coalesced_allocno_live_ranges (allocno);
b15a7ae6
VM
4032 }
4033 else
4034 {
058e97ec
VM
4035 allocno_coalesced_p = true;
4036 merged_p = true;
4037 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4038 fprintf (ira_dump_file,
4039 " Coalescing spilled allocnos a%dr%d->a%dr%d\n",
4040 ALLOCNO_NUM (allocno), ALLOCNO_REGNO (allocno),
4041 ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
1756cb66
VM
4042 ALLOCNO_COALESCE_DATA (allocno)->temp
4043 = ALLOCNO_COALESCE_DATA (a)->temp;
3553f0bb 4044 setup_slot_coalesced_allocno_live_ranges (allocno);
058e97ec 4045 merge_allocnos (a, allocno);
1756cb66 4046 ira_assert (ALLOCNO_COALESCE_DATA (a)->first == a);
058e97ec
VM
4047 }
4048 }
3553f0bb 4049 for (i = 0; i < ira_allocnos_num; i++)
9140d27b 4050 ira_finish_live_range_list (slot_coalesced_allocnos_live_ranges[i]);
3553f0bb 4051 ira_free (slot_coalesced_allocnos_live_ranges);
058e97ec
VM
4052 return merged_p;
4053}
4054
4055/* Sort pseudo-register numbers in array PSEUDO_REGNOS of length N for
4056 subsequent assigning stack slots to them in the reload pass. To do
4057 this we coalesce spilled allocnos first to decrease the number of
4058 memory-memory move insns. This function is called by the
4059 reload. */
4060void
4061ira_sort_regnos_for_alter_reg (int *pseudo_regnos, int n,
4062 unsigned int *reg_max_ref_width)
4063{
4064 int max_regno = max_reg_num ();
4065 int i, regno, num, slot_num;
4066 ira_allocno_t allocno, a;
4067 ira_allocno_iterator ai;
4068 ira_allocno_t *spilled_coalesced_allocnos;
4069
058e97ec
VM
4070 /* Set up allocnos can be coalesced. */
4071 coloring_allocno_bitmap = ira_allocate_bitmap ();
4072 for (i = 0; i < n; i++)
4073 {
4074 regno = pseudo_regnos[i];
4075 allocno = ira_regno_allocno_map[regno];
4076 if (allocno != NULL)
1756cb66 4077 bitmap_set_bit (coloring_allocno_bitmap, ALLOCNO_NUM (allocno));
058e97ec
VM
4078 }
4079 allocno_coalesced_p = false;
22b0982c 4080 processed_coalesced_allocno_bitmap = ira_allocate_bitmap ();
1756cb66
VM
4081 allocno_coalesce_data
4082 = (coalesce_data_t) ira_allocate (sizeof (struct coalesce_data)
4083 * ira_allocnos_num);
4084 /* Initialize coalesce data for allocnos. */
4085 FOR_EACH_ALLOCNO (a, ai)
4086 {
4087 ALLOCNO_ADD_DATA (a) = allocno_coalesce_data + ALLOCNO_NUM (a);
4088 ALLOCNO_COALESCE_DATA (a)->first = a;
4089 ALLOCNO_COALESCE_DATA (a)->next = a;
4090 }
22b0982c 4091 coalesce_allocnos ();
058e97ec
VM
4092 ira_free_bitmap (coloring_allocno_bitmap);
4093 regno_coalesced_allocno_cost
4094 = (int *) ira_allocate (max_regno * sizeof (int));
4095 regno_coalesced_allocno_num
4096 = (int *) ira_allocate (max_regno * sizeof (int));
4097 memset (regno_coalesced_allocno_num, 0, max_regno * sizeof (int));
4098 setup_coalesced_allocno_costs_and_nums (pseudo_regnos, n);
4099 /* Sort regnos according frequencies of the corresponding coalesced
4100 allocno sets. */
4101 qsort (pseudo_regnos, n, sizeof (int), coalesced_pseudo_reg_freq_compare);
4102 spilled_coalesced_allocnos
4103 = (ira_allocno_t *) ira_allocate (ira_allocnos_num
4104 * sizeof (ira_allocno_t));
4105 /* Collect allocnos representing the spilled coalesced allocno
4106 sets. */
4107 num = collect_spilled_coalesced_allocnos (pseudo_regnos, n,
4108 spilled_coalesced_allocnos);
4109 if (flag_ira_share_spill_slots
4110 && coalesce_spill_slots (spilled_coalesced_allocnos, num))
4111 {
4112 setup_coalesced_allocno_costs_and_nums (pseudo_regnos, n);
4113 qsort (pseudo_regnos, n, sizeof (int),
4114 coalesced_pseudo_reg_freq_compare);
4115 num = collect_spilled_coalesced_allocnos (pseudo_regnos, n,
4116 spilled_coalesced_allocnos);
4117 }
4118 ira_free_bitmap (processed_coalesced_allocno_bitmap);
4119 allocno_coalesced_p = false;
4120 /* Assign stack slot numbers to spilled allocno sets, use smaller
4121 numbers for most frequently used coalesced allocnos. -1 is
4122 reserved for dynamic search of stack slots for pseudos spilled by
4123 the reload. */
4124 slot_num = 1;
4125 for (i = 0; i < num; i++)
4126 {
4127 allocno = spilled_coalesced_allocnos[i];
1756cb66 4128 if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno
058e97ec 4129 || ALLOCNO_HARD_REGNO (allocno) >= 0
55a2c322 4130 || ira_equiv_no_lvalue_p (ALLOCNO_REGNO (allocno)))
058e97ec
VM
4131 continue;
4132 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4133 fprintf (ira_dump_file, " Slot %d (freq,size):", slot_num);
4134 slot_num++;
1756cb66
VM
4135 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
4136 a = ALLOCNO_COALESCE_DATA (a)->next)
058e97ec
VM
4137 {
4138 ira_assert (ALLOCNO_HARD_REGNO (a) < 0);
4139 ALLOCNO_HARD_REGNO (a) = -slot_num;
4140 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4141 fprintf (ira_dump_file, " a%dr%d(%d,%d)",
4142 ALLOCNO_NUM (a), ALLOCNO_REGNO (a), ALLOCNO_FREQ (a),
4143 MAX (PSEUDO_REGNO_BYTES (ALLOCNO_REGNO (a)),
4144 reg_max_ref_width[ALLOCNO_REGNO (a)]));
b8698a0f 4145
058e97ec
VM
4146 if (a == allocno)
4147 break;
4148 }
4149 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4150 fprintf (ira_dump_file, "\n");
4151 }
4152 ira_spilled_reg_stack_slots_num = slot_num - 1;
4153 ira_free (spilled_coalesced_allocnos);
4154 /* Sort regnos according the slot numbers. */
4155 regno_max_ref_width = reg_max_ref_width;
4156 qsort (pseudo_regnos, n, sizeof (int), coalesced_pseudo_reg_slot_compare);
058e97ec 4157 FOR_EACH_ALLOCNO (a, ai)
1756cb66
VM
4158 ALLOCNO_ADD_DATA (a) = NULL;
4159 ira_free (allocno_coalesce_data);
058e97ec
VM
4160 ira_free (regno_coalesced_allocno_num);
4161 ira_free (regno_coalesced_allocno_cost);
4162}
4163
4164\f
4165
4166/* This page contains code used by the reload pass to improve the
4167 final code. */
4168
4169/* The function is called from reload to mark changes in the
4170 allocation of REGNO made by the reload. Remember that reg_renumber
4171 reflects the change result. */
4172void
4173ira_mark_allocation_change (int regno)
4174{
4175 ira_allocno_t a = ira_regno_allocno_map[regno];
4176 int old_hard_regno, hard_regno, cost;
1756cb66 4177 enum reg_class aclass = ALLOCNO_CLASS (a);
058e97ec
VM
4178
4179 ira_assert (a != NULL);
4180 hard_regno = reg_renumber[regno];
4181 if ((old_hard_regno = ALLOCNO_HARD_REGNO (a)) == hard_regno)
4182 return;
4183 if (old_hard_regno < 0)
4184 cost = -ALLOCNO_MEMORY_COST (a);
4185 else
4186 {
1756cb66 4187 ira_assert (ira_class_hard_reg_index[aclass][old_hard_regno] >= 0);
058e97ec 4188 cost = -(ALLOCNO_HARD_REG_COSTS (a) == NULL
1756cb66 4189 ? ALLOCNO_CLASS_COST (a)
058e97ec 4190 : ALLOCNO_HARD_REG_COSTS (a)
1756cb66 4191 [ira_class_hard_reg_index[aclass][old_hard_regno]]);
c73ccc80 4192 update_costs_from_copies (a, false, false);
058e97ec
VM
4193 }
4194 ira_overall_cost -= cost;
4195 ALLOCNO_HARD_REGNO (a) = hard_regno;
4196 if (hard_regno < 0)
4197 {
4198 ALLOCNO_HARD_REGNO (a) = -1;
4199 cost += ALLOCNO_MEMORY_COST (a);
4200 }
1756cb66 4201 else if (ira_class_hard_reg_index[aclass][hard_regno] >= 0)
058e97ec
VM
4202 {
4203 cost += (ALLOCNO_HARD_REG_COSTS (a) == NULL
1756cb66 4204 ? ALLOCNO_CLASS_COST (a)
058e97ec 4205 : ALLOCNO_HARD_REG_COSTS (a)
1756cb66 4206 [ira_class_hard_reg_index[aclass][hard_regno]]);
c73ccc80 4207 update_costs_from_copies (a, true, false);
058e97ec
VM
4208 }
4209 else
4210 /* Reload changed class of the allocno. */
4211 cost = 0;
4212 ira_overall_cost += cost;
4213}
4214
4215/* This function is called when reload deletes memory-memory move. In
4216 this case we marks that the allocation of the corresponding
4217 allocnos should be not changed in future. Otherwise we risk to get
4218 a wrong code. */
4219void
4220ira_mark_memory_move_deletion (int dst_regno, int src_regno)
4221{
4222 ira_allocno_t dst = ira_regno_allocno_map[dst_regno];
4223 ira_allocno_t src = ira_regno_allocno_map[src_regno];
4224
4225 ira_assert (dst != NULL && src != NULL
4226 && ALLOCNO_HARD_REGNO (dst) < 0
4227 && ALLOCNO_HARD_REGNO (src) < 0);
4228 ALLOCNO_DONT_REASSIGN_P (dst) = true;
4229 ALLOCNO_DONT_REASSIGN_P (src) = true;
4230}
4231
4232/* Try to assign a hard register (except for FORBIDDEN_REGS) to
3631be48 4233 allocno A and return TRUE in the case of success. */
058e97ec
VM
4234static bool
4235allocno_reload_assign (ira_allocno_t a, HARD_REG_SET forbidden_regs)
4236{
4237 int hard_regno;
1756cb66 4238 enum reg_class aclass;
058e97ec 4239 int regno = ALLOCNO_REGNO (a);
ac0ab4f7
BS
4240 HARD_REG_SET saved[2];
4241 int i, n;
058e97ec 4242
ac0ab4f7
BS
4243 n = ALLOCNO_NUM_OBJECTS (a);
4244 for (i = 0; i < n; i++)
4245 {
4246 ira_object_t obj = ALLOCNO_OBJECT (a, i);
4247 COPY_HARD_REG_SET (saved[i], OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
4248 IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), forbidden_regs);
4249 if (! flag_caller_saves && ALLOCNO_CALLS_CROSSED_NUM (a) != 0)
4250 IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
4251 call_used_reg_set);
4252 }
058e97ec 4253 ALLOCNO_ASSIGNED_P (a) = false;
1756cb66 4254 aclass = ALLOCNO_CLASS (a);
058e97ec
VM
4255 update_curr_costs (a);
4256 assign_hard_reg (a, true);
4257 hard_regno = ALLOCNO_HARD_REGNO (a);
4258 reg_renumber[regno] = hard_regno;
4259 if (hard_regno < 0)
4260 ALLOCNO_HARD_REGNO (a) = -1;
4261 else
4262 {
1756cb66
VM
4263 ira_assert (ira_class_hard_reg_index[aclass][hard_regno] >= 0);
4264 ira_overall_cost
4265 -= (ALLOCNO_MEMORY_COST (a)
4266 - (ALLOCNO_HARD_REG_COSTS (a) == NULL
4267 ? ALLOCNO_CLASS_COST (a)
4268 : ALLOCNO_HARD_REG_COSTS (a)[ira_class_hard_reg_index
4269 [aclass][hard_regno]]));
058e97ec 4270 if (ALLOCNO_CALLS_CROSSED_NUM (a) != 0
9181a6e5
VM
4271 && ira_hard_reg_set_intersection_p (hard_regno, ALLOCNO_MODE (a),
4272 call_used_reg_set))
058e97ec
VM
4273 {
4274 ira_assert (flag_caller_saves);
4275 caller_save_needed = 1;
4276 }
4277 }
4278
4279 /* If we found a hard register, modify the RTL for the pseudo
4280 register to show the hard register, and mark the pseudo register
4281 live. */
4282 if (reg_renumber[regno] >= 0)
4283 {
4284 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4285 fprintf (ira_dump_file, ": reassign to %d\n", reg_renumber[regno]);
4286 SET_REGNO (regno_reg_rtx[regno], reg_renumber[regno]);
4287 mark_home_live (regno);
4288 }
4289 else if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4290 fprintf (ira_dump_file, "\n");
ac0ab4f7
BS
4291 for (i = 0; i < n; i++)
4292 {
4293 ira_object_t obj = ALLOCNO_OBJECT (a, i);
4294 COPY_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), saved[i]);
4295 }
058e97ec
VM
4296 return reg_renumber[regno] >= 0;
4297}
4298
4299/* Sort pseudos according their usage frequencies (putting most
4300 frequently ones first). */
4301static int
4302pseudo_reg_compare (const void *v1p, const void *v2p)
4303{
4304 int regno1 = *(const int *) v1p;
4305 int regno2 = *(const int *) v2p;
4306 int diff;
4307
4308 if ((diff = REG_FREQ (regno2) - REG_FREQ (regno1)) != 0)
4309 return diff;
4310 return regno1 - regno2;
4311}
4312
4313/* Try to allocate hard registers to SPILLED_PSEUDO_REGS (there are
4314 NUM of them) or spilled pseudos conflicting with pseudos in
4315 SPILLED_PSEUDO_REGS. Return TRUE and update SPILLED, if the
4316 allocation has been changed. The function doesn't use
4317 BAD_SPILL_REGS and hard registers in PSEUDO_FORBIDDEN_REGS and
4318 PSEUDO_PREVIOUS_REGS for the corresponding pseudos. The function
4319 is called by the reload pass at the end of each reload
4320 iteration. */
4321bool
4322ira_reassign_pseudos (int *spilled_pseudo_regs, int num,
4323 HARD_REG_SET bad_spill_regs,
4324 HARD_REG_SET *pseudo_forbidden_regs,
6190446b
JL
4325 HARD_REG_SET *pseudo_previous_regs,
4326 bitmap spilled)
058e97ec 4327{
016f9d9d 4328 int i, n, regno;
058e97ec 4329 bool changed_p;
fa86d337 4330 ira_allocno_t a;
058e97ec 4331 HARD_REG_SET forbidden_regs;
6190446b
JL
4332 bitmap temp = BITMAP_ALLOC (NULL);
4333
4334 /* Add pseudos which conflict with pseudos already in
4335 SPILLED_PSEUDO_REGS to SPILLED_PSEUDO_REGS. This is preferable
4336 to allocating in two steps as some of the conflicts might have
4337 a higher priority than the pseudos passed in SPILLED_PSEUDO_REGS. */
4338 for (i = 0; i < num; i++)
4339 bitmap_set_bit (temp, spilled_pseudo_regs[i]);
4340
4341 for (i = 0, n = num; i < n; i++)
4342 {
ac0ab4f7 4343 int nr, j;
6190446b
JL
4344 int regno = spilled_pseudo_regs[i];
4345 bitmap_set_bit (temp, regno);
4346
4347 a = ira_regno_allocno_map[regno];
ac0ab4f7
BS
4348 nr = ALLOCNO_NUM_OBJECTS (a);
4349 for (j = 0; j < nr; j++)
fa86d337 4350 {
ac0ab4f7
BS
4351 ira_object_t conflict_obj;
4352 ira_object_t obj = ALLOCNO_OBJECT (a, j);
4353 ira_object_conflict_iterator oci;
4354
4355 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
fa86d337 4356 {
ac0ab4f7
BS
4357 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
4358 if (ALLOCNO_HARD_REGNO (conflict_a) < 0
4359 && ! ALLOCNO_DONT_REASSIGN_P (conflict_a)
fcaa4ca4 4360 && bitmap_set_bit (temp, ALLOCNO_REGNO (conflict_a)))
ac0ab4f7
BS
4361 {
4362 spilled_pseudo_regs[num++] = ALLOCNO_REGNO (conflict_a);
ac0ab4f7
BS
4363 /* ?!? This seems wrong. */
4364 bitmap_set_bit (consideration_allocno_bitmap,
4365 ALLOCNO_NUM (conflict_a));
4366 }
fa86d337
BS
4367 }
4368 }
6190446b 4369 }
058e97ec
VM
4370
4371 if (num > 1)
4372 qsort (spilled_pseudo_regs, num, sizeof (int), pseudo_reg_compare);
4373 changed_p = false;
4374 /* Try to assign hard registers to pseudos from
4375 SPILLED_PSEUDO_REGS. */
016f9d9d 4376 for (i = 0; i < num; i++)
058e97ec
VM
4377 {
4378 regno = spilled_pseudo_regs[i];
4379 COPY_HARD_REG_SET (forbidden_regs, bad_spill_regs);
4380 IOR_HARD_REG_SET (forbidden_regs, pseudo_forbidden_regs[regno]);
4381 IOR_HARD_REG_SET (forbidden_regs, pseudo_previous_regs[regno]);
4382 gcc_assert (reg_renumber[regno] < 0);
4383 a = ira_regno_allocno_map[regno];
4384 ira_mark_allocation_change (regno);
4385 ira_assert (reg_renumber[regno] < 0);
4386 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4387 fprintf (ira_dump_file,
6190446b 4388 " Try Assign %d(a%d), cost=%d", regno, ALLOCNO_NUM (a),
058e97ec 4389 ALLOCNO_MEMORY_COST (a)
1756cb66 4390 - ALLOCNO_CLASS_COST (a));
058e97ec
VM
4391 allocno_reload_assign (a, forbidden_regs);
4392 if (reg_renumber[regno] >= 0)
4393 {
4394 CLEAR_REGNO_REG_SET (spilled, regno);
4395 changed_p = true;
4396 }
058e97ec 4397 }
6190446b 4398 BITMAP_FREE (temp);
058e97ec
VM
4399 return changed_p;
4400}
4401
4402/* The function is called by reload and returns already allocated
4403 stack slot (if any) for REGNO with given INHERENT_SIZE and
4404 TOTAL_SIZE. In the case of failure to find a slot which can be
4405 used for REGNO, the function returns NULL. */
4406rtx
4407ira_reuse_stack_slot (int regno, unsigned int inherent_size,
4408 unsigned int total_size)
4409{
4410 unsigned int i;
4411 int slot_num, best_slot_num;
4412 int cost, best_cost;
4413 ira_copy_t cp, next_cp;
4414 ira_allocno_t another_allocno, allocno = ira_regno_allocno_map[regno];
4415 rtx x;
4416 bitmap_iterator bi;
4417 struct ira_spilled_reg_stack_slot *slot = NULL;
4418
2af2dbdc 4419 ira_assert (inherent_size == PSEUDO_REGNO_BYTES (regno)
058e97ec
VM
4420 && inherent_size <= total_size
4421 && ALLOCNO_HARD_REGNO (allocno) < 0);
4422 if (! flag_ira_share_spill_slots)
4423 return NULL_RTX;
4424 slot_num = -ALLOCNO_HARD_REGNO (allocno) - 2;
4425 if (slot_num != -1)
4426 {
4427 slot = &ira_spilled_reg_stack_slots[slot_num];
4428 x = slot->mem;
4429 }
4430 else
4431 {
4432 best_cost = best_slot_num = -1;
4433 x = NULL_RTX;
4434 /* It means that the pseudo was spilled in the reload pass, try
4435 to reuse a slot. */
4436 for (slot_num = 0;
4437 slot_num < ira_spilled_reg_stack_slots_num;
4438 slot_num++)
4439 {
4440 slot = &ira_spilled_reg_stack_slots[slot_num];
4441 if (slot->mem == NULL_RTX)
4442 continue;
4443 if (slot->width < total_size
4444 || GET_MODE_SIZE (GET_MODE (slot->mem)) < inherent_size)
4445 continue;
b8698a0f 4446
058e97ec
VM
4447 EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs,
4448 FIRST_PSEUDO_REGISTER, i, bi)
4449 {
4450 another_allocno = ira_regno_allocno_map[i];
1756cb66
VM
4451 if (allocnos_conflict_by_live_ranges_p (allocno,
4452 another_allocno))
058e97ec
VM
4453 goto cont;
4454 }
4455 for (cost = 0, cp = ALLOCNO_COPIES (allocno);
4456 cp != NULL;
4457 cp = next_cp)
4458 {
4459 if (cp->first == allocno)
4460 {
4461 next_cp = cp->next_first_allocno_copy;
4462 another_allocno = cp->second;
4463 }
4464 else if (cp->second == allocno)
4465 {
4466 next_cp = cp->next_second_allocno_copy;
4467 another_allocno = cp->first;
4468 }
4469 else
4470 gcc_unreachable ();
4471 if (cp->insn == NULL_RTX)
4472 continue;
4473 if (bitmap_bit_p (&slot->spilled_regs,
4474 ALLOCNO_REGNO (another_allocno)))
4475 cost += cp->freq;
4476 }
4477 if (cost > best_cost)
4478 {
4479 best_cost = cost;
4480 best_slot_num = slot_num;
4481 }
4482 cont:
4483 ;
4484 }
4485 if (best_cost >= 0)
4486 {
99b96649
EB
4487 slot_num = best_slot_num;
4488 slot = &ira_spilled_reg_stack_slots[slot_num];
058e97ec
VM
4489 SET_REGNO_REG_SET (&slot->spilled_regs, regno);
4490 x = slot->mem;
99b96649 4491 ALLOCNO_HARD_REGNO (allocno) = -slot_num - 2;
058e97ec
VM
4492 }
4493 }
4494 if (x != NULL_RTX)
4495 {
4496 ira_assert (slot->width >= total_size);
f7556aae 4497#ifdef ENABLE_IRA_CHECKING
058e97ec
VM
4498 EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs,
4499 FIRST_PSEUDO_REGISTER, i, bi)
4500 {
1756cb66 4501 ira_assert (! conflict_by_live_ranges_p (regno, i));
058e97ec 4502 }
f7556aae 4503#endif
058e97ec
VM
4504 SET_REGNO_REG_SET (&slot->spilled_regs, regno);
4505 if (internal_flag_ira_verbose > 3 && ira_dump_file)
4506 {
4507 fprintf (ira_dump_file, " Assigning %d(freq=%d) slot %d of",
4508 regno, REG_FREQ (regno), slot_num);
4509 EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs,
4510 FIRST_PSEUDO_REGISTER, i, bi)
4511 {
4512 if ((unsigned) regno != i)
4513 fprintf (ira_dump_file, " %d", i);
4514 }
4515 fprintf (ira_dump_file, "\n");
4516 }
4517 }
4518 return x;
4519}
4520
4521/* This is called by reload every time a new stack slot X with
4522 TOTAL_SIZE was allocated for REGNO. We store this info for
4523 subsequent ira_reuse_stack_slot calls. */
4524void
4525ira_mark_new_stack_slot (rtx x, int regno, unsigned int total_size)
4526{
4527 struct ira_spilled_reg_stack_slot *slot;
4528 int slot_num;
4529 ira_allocno_t allocno;
4530
2af2dbdc 4531 ira_assert (PSEUDO_REGNO_BYTES (regno) <= total_size);
058e97ec
VM
4532 allocno = ira_regno_allocno_map[regno];
4533 slot_num = -ALLOCNO_HARD_REGNO (allocno) - 2;
4534 if (slot_num == -1)
4535 {
4536 slot_num = ira_spilled_reg_stack_slots_num++;
4537 ALLOCNO_HARD_REGNO (allocno) = -slot_num - 2;
4538 }
4539 slot = &ira_spilled_reg_stack_slots[slot_num];
4540 INIT_REG_SET (&slot->spilled_regs);
4541 SET_REGNO_REG_SET (&slot->spilled_regs, regno);
4542 slot->mem = x;
4543 slot->width = total_size;
4544 if (internal_flag_ira_verbose > 3 && ira_dump_file)
4545 fprintf (ira_dump_file, " Assigning %d(freq=%d) a new slot %d\n",
4546 regno, REG_FREQ (regno), slot_num);
4547}
4548
4549
4550/* Return spill cost for pseudo-registers whose numbers are in array
4551 REGNOS (with a negative number as an end marker) for reload with
4552 given IN and OUT for INSN. Return also number points (through
4553 EXCESS_PRESSURE_LIVE_LENGTH) where the pseudo-register lives and
4554 the register pressure is high, number of references of the
4555 pseudo-registers (through NREFS), number of callee-clobbered
4556 hard-registers occupied by the pseudo-registers (through
4557 CALL_USED_COUNT), and the first hard regno occupied by the
4558 pseudo-registers (through FIRST_HARD_REGNO). */
4559static int
4560calculate_spill_cost (int *regnos, rtx in, rtx out, rtx insn,
4561 int *excess_pressure_live_length,
4562 int *nrefs, int *call_used_count, int *first_hard_regno)
4563{
4564 int i, cost, regno, hard_regno, j, count, saved_cost, nregs;
4565 bool in_p, out_p;
4566 int length;
4567 ira_allocno_t a;
4568
4569 *nrefs = 0;
4570 for (length = count = cost = i = 0;; i++)
4571 {
4572 regno = regnos[i];
4573 if (regno < 0)
4574 break;
4575 *nrefs += REG_N_REFS (regno);
4576 hard_regno = reg_renumber[regno];
4577 ira_assert (hard_regno >= 0);
4578 a = ira_regno_allocno_map[regno];
ac0ab4f7 4579 length += ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a) / ALLOCNO_NUM_OBJECTS (a);
1756cb66 4580 cost += ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a);
058e97ec
VM
4581 nregs = hard_regno_nregs[hard_regno][ALLOCNO_MODE (a)];
4582 for (j = 0; j < nregs; j++)
4583 if (! TEST_HARD_REG_BIT (call_used_reg_set, hard_regno + j))
4584 break;
4585 if (j == nregs)
4586 count++;
4587 in_p = in && REG_P (in) && (int) REGNO (in) == hard_regno;
4588 out_p = out && REG_P (out) && (int) REGNO (out) == hard_regno;
4589 if ((in_p || out_p)
4590 && find_regno_note (insn, REG_DEAD, hard_regno) != NULL_RTX)
4591 {
4592 saved_cost = 0;
4593 if (in_p)
4594 saved_cost += ira_memory_move_cost
1756cb66 4595 [ALLOCNO_MODE (a)][ALLOCNO_CLASS (a)][1];
058e97ec
VM
4596 if (out_p)
4597 saved_cost
4598 += ira_memory_move_cost
1756cb66 4599 [ALLOCNO_MODE (a)][ALLOCNO_CLASS (a)][0];
058e97ec
VM
4600 cost -= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn)) * saved_cost;
4601 }
4602 }
4603 *excess_pressure_live_length = length;
4604 *call_used_count = count;
4605 hard_regno = -1;
4606 if (regnos[0] >= 0)
4607 {
4608 hard_regno = reg_renumber[regnos[0]];
4609 }
4610 *first_hard_regno = hard_regno;
4611 return cost;
4612}
4613
4614/* Return TRUE if spilling pseudo-registers whose numbers are in array
4615 REGNOS is better than spilling pseudo-registers with numbers in
4616 OTHER_REGNOS for reload with given IN and OUT for INSN. The
4617 function used by the reload pass to make better register spilling
4618 decisions. */
4619bool
4620ira_better_spill_reload_regno_p (int *regnos, int *other_regnos,
4621 rtx in, rtx out, rtx insn)
4622{
4623 int cost, other_cost;
4624 int length, other_length;
4625 int nrefs, other_nrefs;
4626 int call_used_count, other_call_used_count;
4627 int hard_regno, other_hard_regno;
4628
b8698a0f 4629 cost = calculate_spill_cost (regnos, in, out, insn,
058e97ec
VM
4630 &length, &nrefs, &call_used_count, &hard_regno);
4631 other_cost = calculate_spill_cost (other_regnos, in, out, insn,
4632 &other_length, &other_nrefs,
4633 &other_call_used_count,
4634 &other_hard_regno);
4635 if (nrefs == 0 && other_nrefs != 0)
4636 return true;
4637 if (nrefs != 0 && other_nrefs == 0)
4638 return false;
4639 if (cost != other_cost)
4640 return cost < other_cost;
4641 if (length != other_length)
4642 return length > other_length;
4643#ifdef REG_ALLOC_ORDER
4644 if (hard_regno >= 0 && other_hard_regno >= 0)
4645 return (inv_reg_alloc_order[hard_regno]
4646 < inv_reg_alloc_order[other_hard_regno]);
4647#else
4648 if (call_used_count != other_call_used_count)
4649 return call_used_count > other_call_used_count;
4650#endif
4651 return false;
4652}
4653
4654\f
4655
4656/* Allocate and initialize data necessary for assign_hard_reg. */
4657void
4658ira_initiate_assign (void)
4659{
4660 sorted_allocnos
4661 = (ira_allocno_t *) ira_allocate (sizeof (ira_allocno_t)
4662 * ira_allocnos_num);
4663 consideration_allocno_bitmap = ira_allocate_bitmap ();
4664 initiate_cost_update ();
4665 allocno_priorities = (int *) ira_allocate (sizeof (int) * ira_allocnos_num);
bf08fb16
VM
4666 sorted_copies = (ira_copy_t *) ira_allocate (ira_copies_num
4667 * sizeof (ira_copy_t));
058e97ec
VM
4668}
4669
4670/* Deallocate data used by assign_hard_reg. */
4671void
4672ira_finish_assign (void)
4673{
4674 ira_free (sorted_allocnos);
4675 ira_free_bitmap (consideration_allocno_bitmap);
4676 finish_cost_update ();
4677 ira_free (allocno_priorities);
bf08fb16 4678 ira_free (sorted_copies);
058e97ec
VM
4679}
4680
4681\f
4682
4683/* Entry function doing color-based register allocation. */
cb1ca6ac
VM
4684static void
4685color (void)
058e97ec 4686{
9771b263 4687 allocno_stack_vec.create (ira_allocnos_num);
058e97ec
VM
4688 memset (allocated_hardreg_p, 0, sizeof (allocated_hardreg_p));
4689 ira_initiate_assign ();
4690 do_coloring ();
4691 ira_finish_assign ();
9771b263 4692 allocno_stack_vec.release ();
058e97ec
VM
4693 move_spill_restore ();
4694}
4695
4696\f
4697
4698/* This page contains a simple register allocator without usage of
4699 allocno conflicts. This is used for fast allocation for -O0. */
4700
4701/* Do register allocation by not using allocno conflicts. It uses
4702 only allocno live ranges. The algorithm is close to Chow's
4703 priority coloring. */
cb1ca6ac
VM
4704static void
4705fast_allocation (void)
058e97ec 4706{
1ae64b0f 4707 int i, j, k, num, class_size, hard_regno;
058e97ec
VM
4708#ifdef STACK_REGS
4709 bool no_stack_reg_p;
4710#endif
1756cb66 4711 enum reg_class aclass;
058e97ec
VM
4712 enum machine_mode mode;
4713 ira_allocno_t a;
4714 ira_allocno_iterator ai;
b14151b5 4715 live_range_t r;
058e97ec
VM
4716 HARD_REG_SET conflict_hard_regs, *used_hard_regs;
4717
058e97ec
VM
4718 sorted_allocnos = (ira_allocno_t *) ira_allocate (sizeof (ira_allocno_t)
4719 * ira_allocnos_num);
4720 num = 0;
4721 FOR_EACH_ALLOCNO (a, ai)
4722 sorted_allocnos[num++] = a;
1ae64b0f
VM
4723 allocno_priorities = (int *) ira_allocate (sizeof (int) * ira_allocnos_num);
4724 setup_allocno_priorities (sorted_allocnos, num);
4725 used_hard_regs = (HARD_REG_SET *) ira_allocate (sizeof (HARD_REG_SET)
4726 * ira_max_point);
4727 for (i = 0; i < ira_max_point; i++)
4728 CLEAR_HARD_REG_SET (used_hard_regs[i]);
311aab06 4729 qsort (sorted_allocnos, num, sizeof (ira_allocno_t),
058e97ec
VM
4730 allocno_priority_compare_func);
4731 for (i = 0; i < num; i++)
4732 {
ac0ab4f7
BS
4733 int nr, l;
4734
058e97ec 4735 a = sorted_allocnos[i];
ac0ab4f7
BS
4736 nr = ALLOCNO_NUM_OBJECTS (a);
4737 CLEAR_HARD_REG_SET (conflict_hard_regs);
4738 for (l = 0; l < nr; l++)
4739 {
4740 ira_object_t obj = ALLOCNO_OBJECT (a, l);
4741 IOR_HARD_REG_SET (conflict_hard_regs,
4742 OBJECT_CONFLICT_HARD_REGS (obj));
4743 for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next)
4744 for (j = r->start; j <= r->finish; j++)
4745 IOR_HARD_REG_SET (conflict_hard_regs, used_hard_regs[j]);
4746 }
1756cb66 4747 aclass = ALLOCNO_CLASS (a);
6b8d9676
VM
4748 ALLOCNO_ASSIGNED_P (a) = true;
4749 ALLOCNO_HARD_REGNO (a) = -1;
1756cb66 4750 if (hard_reg_set_subset_p (reg_class_contents[aclass],
058e97ec
VM
4751 conflict_hard_regs))
4752 continue;
4753 mode = ALLOCNO_MODE (a);
4754#ifdef STACK_REGS
4755 no_stack_reg_p = ALLOCNO_NO_STACK_REG_P (a);
4756#endif
1756cb66 4757 class_size = ira_class_hard_regs_num[aclass];
058e97ec
VM
4758 for (j = 0; j < class_size; j++)
4759 {
1756cb66 4760 hard_regno = ira_class_hard_regs[aclass][j];
058e97ec
VM
4761#ifdef STACK_REGS
4762 if (no_stack_reg_p && FIRST_STACK_REG <= hard_regno
4763 && hard_regno <= LAST_STACK_REG)
4764 continue;
4765#endif
9181a6e5 4766 if (ira_hard_reg_set_intersection_p (hard_regno, mode, conflict_hard_regs)
058e97ec 4767 || (TEST_HARD_REG_BIT
1756cb66 4768 (ira_prohibited_class_mode_regs[aclass][mode], hard_regno)))
058e97ec
VM
4769 continue;
4770 ALLOCNO_HARD_REGNO (a) = hard_regno;
ac0ab4f7
BS
4771 for (l = 0; l < nr; l++)
4772 {
4773 ira_object_t obj = ALLOCNO_OBJECT (a, l);
4774 for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next)
4775 for (k = r->start; k <= r->finish; k++)
4776 IOR_HARD_REG_SET (used_hard_regs[k],
4777 ira_reg_mode_hard_regset[hard_regno][mode]);
4778 }
058e97ec
VM
4779 break;
4780 }
4781 }
4782 ira_free (sorted_allocnos);
4783 ira_free (used_hard_regs);
4784 ira_free (allocno_priorities);
4785 if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL)
4786 ira_print_disposition (ira_dump_file);
4787}
cb1ca6ac
VM
4788
4789\f
4790
4791/* Entry function doing coloring. */
4792void
4793ira_color (void)
4794{
4795 ira_allocno_t a;
4796 ira_allocno_iterator ai;
4797
4798 /* Setup updated costs. */
4799 FOR_EACH_ALLOCNO (a, ai)
4800 {
4801 ALLOCNO_UPDATED_MEMORY_COST (a) = ALLOCNO_MEMORY_COST (a);
1756cb66 4802 ALLOCNO_UPDATED_CLASS_COST (a) = ALLOCNO_CLASS_COST (a);
cb1ca6ac 4803 }
311aab06 4804 if (ira_conflicts_p)
cb1ca6ac
VM
4805 color ();
4806 else
4807 fast_allocation ();
4808}
This page took 3.025664 seconds and 5 git commands to generate.