Bug 45805 - VFP/Neon double precision register expected -- `vmovl.s16 q2,s8
Summary: VFP/Neon double precision register expected -- `vmovl.s16 q2,s8
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 4.6.0
: P3 normal
Target Milestone: ---
Assignee: Tejas Belagod
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2010-09-27 04:39 UTC by Khem Raj
Modified: 2010-10-08 12:53 UTC (History)
2 users (show)

See Also:
Host: x86_64-linux
Target: arm-none-linux-gnueabi
Build: x86_64-linux
Known to work:
Known to fail:
Last reconfirmed:


Attachments
testcase (203 bytes, text/plain)
2010-09-27 04:39 UTC, Khem Raj
Details
Fix register specifier in instruction template for vmovl. (354 bytes, patch)
2010-09-27 17:36 UTC, Tejas Belagod
Details | Diff
vmov[l,n] fix (446 bytes, patch)
2010-09-28 16:27 UTC, Tejas Belagod
Details | Diff

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Description Khem Raj 2010-09-27 04:39:58 UTC
Created attachment 21892 [details]
testcase

The attached testcase does not compile with gcc trunk when using vectorizer and neon on arm.

arm-oe-linux-gnueabi-gcc -mfpu=neon -mfloat-abi=softfp -O3 -c test.c

It works fine if I add -mvectorize-with-neon-quad option

here is my gcc configuration
Using built-in specs.
COLLECT_GCC=arm-none-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/home/kraj/work/cross/arm-none-linux-gnueabi/tools/libexec/gcc/arm-none-linux-gnueabi/4.6.0/lto-wrapper
Target: arm-none-linux-gnueabi
Configured with: /home/kraj/work/cross/arm-none-linux-gnueabi/../../gcc-trunk/configure --target=arm-none-linux-gnueabi --prefix=/home/kraj/work/cross/arm-none-linux-gnueabi/tools --with-sysroot=/home/kraj/work/cross/arm-none-linux-gnueabi/sysroot --enable-__cxa_atexit --disable-libssp --disable-libgomp --disable-libmudflap --enable-languages=c,c++
Thread model: posix
gcc version 4.6.0 20100927 (experimental) (GCC)
Comment 1 Tejas Belagod 2010-09-27 17:36:57 UTC
Created attachment 21897 [details]
Fix register specifier in instruction template for vmovl.
Comment 2 Khem Raj 2010-09-27 18:33:58 UTC
(In reply to comment #1)
> Created attachment 21897 [details]
> Fix register specifier in instruction template for vmovl.

I tried similar patch locally before submitting the bug (changed only vmovl pattern)
but I got an ICE which is again same I am getting with this patch too

$ arm-none-linux-gnueabi-gcc-4.6.0 -mfloat-abi=softfp -mfpu=neon a.c -O3
a.c: In function ‘try_8x8basis_c’:
a.c:14:1: internal compiler error: output_operand: invalid operand for code 'P'
Comment 3 Tejas Belagod 2010-09-28 10:58:31 UTC
(In reply to comment #2)
> (In reply to comment #1)
> > Created attachment 21897 [details] [details]
> > Fix register specifier in instruction template for vmovl.
> 
> I tried similar patch locally before submitting the bug (changed only vmovl
> pattern)
> but I got an ICE which is again same I am getting with this patch too
> 
> $ arm-none-linux-gnueabi-gcc-4.6.0 -mfloat-abi=softfp -mfpu=neon a.c -O3
> a.c: In function ‘try_8x8basis_c’:
> a.c:14:1: internal compiler error: output_operand: invalid operand for code 'P'

That's strange. I'm not able to reproduce the ICE on my side with or without -mvectorize-with-neon-quad with this patch. I don't know if configuring to build for cortex-a9 has anything to do with this because that's what is on my side and you don't seem to have it configured to build for a cpu with NEON. Does the ICE happen if you specify -mcpu=cortex-a9 on the command-line? Also, are you using trunk's HEAD?
Comment 4 Khem Raj 2010-09-28 15:22:53 UTC
(In reply to comment #3)
> (In reply to comment #2)
> > (In reply to comment #1)
> > > Created attachment 21897 [details] [details] [details]
> > > Fix register specifier in instruction template for vmovl.
> > 
> > I tried similar patch locally before submitting the bug (changed only vmovl
> > pattern)
> > but I got an ICE which is again same I am getting with this patch too
> > 
> > $ arm-none-linux-gnueabi-gcc-4.6.0 -mfloat-abi=softfp -mfpu=neon a.c -O3
> > a.c: In function ‘try_8x8basis_c’:
> > a.c:14:1: internal compiler error: output_operand: invalid operand for code 'P'
> 
> That's strange. I'm not able to reproduce the ICE on my side with or without
> -mvectorize-with-neon-quad with this patch. I don't know if configuring to
> build for cortex-a9 has anything to do with this because that's what is on my
> side and you don't seem to have it configured to build for a cpu with NEON.
> Does the ICE happen if you specify -mcpu=cortex-a9 on the command-line? Also,
> are you using trunk's HEAD?

with -mcpu=cortex-a9 it works without it gets the ICE. you can try -mcpu=cortex-a8 it should ICE.
Comment 5 Tejas Belagod 2010-09-28 16:25:37 UTC
(In reply to comment #4)
> (In reply to comment #3)
> > (In reply to comment #2)
> > > (In reply to comment #1)
> > > > Created attachment 21897 [details] [details] [details] [details]
> > > > Fix register specifier in instruction template for vmovl.
> > > 
> > > I tried similar patch locally before submitting the bug (changed only vmovl
> > > pattern)
> > > but I got an ICE which is again same I am getting with this patch too
> > > 
> > > $ arm-none-linux-gnueabi-gcc-4.6.0 -mfloat-abi=softfp -mfpu=neon a.c -O3
> > > a.c: In function ‘try_8x8basis_c’:
> > > a.c:14:1: internal compiler error: output_operand: invalid operand for code 'P'
> > 
> > That's strange. I'm not able to reproduce the ICE on my side with or without
> > -mvectorize-with-neon-quad with this patch. I don't know if configuring to
> > build for cortex-a9 has anything to do with this because that's what is on my
> > side and you don't seem to have it configured to build for a cpu with NEON.
> > Does the ICE happen if you specify -mcpu=cortex-a9 on the command-line? Also,
> > are you using trunk's HEAD?
> 
> with -mcpu=cortex-a9 it works without it gets the ICE. you can try
> -mcpu=cortex-a8 it should ICE.

Ah, now I can reproduce it. The rtl-trace shows that memory operands were being matched for the neon_unpack<US>_<mode> pattern inpsite of the 'register_operand' predicate. The constraint here needs a "w" which makes the ICE go away by matching register operands only and your example to compile fine. I've attached another patch.
Comment 6 Tejas Belagod 2010-09-28 16:27:09 UTC
Created attachment 21903 [details]
vmov[l,n] fix
Comment 7 Khem Raj 2010-09-28 18:30:52 UTC
(In reply to comment #6)
> Created attachment 21903 [details]
> vmov[l,n] fix

yes the 'w' constraint will do the trick.
this patch works well for me.
Comment 8 Tejas Belagod 2010-10-07 16:00:13 UTC
Author: belagod
Date: Thu Oct  7 16:00:06 2010
New Revision: 165122

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=165122
Log:
2010-10-07  Tejas Belagod  <tejas.belagod@arm.com>

	PR target/45805
        * config/arm/neon.md (neon_unpack<US>_<mode>): Add 'w' to
        constraint, add register specifier in instruction template.
        (neon_vec_pack_trunc_<mode>): Likewise.
        (neon_vec_<US>mult_<mode>): Add register specifier to
        instruction template.


Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/arm/neon.md
Comment 9 Tejas Belagod 2010-10-08 12:53:04 UTC
This bug has been fixed.
Comment 10 richard.earnshaw 2010-10-08 12:53:40 UTC
I shall be out of the office from Monday 11 October until Monday 1 November; I will not have email access during most of that time, so I will read your message when I return.
For urgent issues, please contact Roger Teague or Matthew Gretton-Dann.