While looking through LAPACK I notices a few patterns. For example, in drotg, "r = dsign(1.0d0,x)*y". This is really "r = y ^ (x & sign-bit)". Compare this with "r = (1.0 | (x & sign-bit)) * y" when expanding copysign on most systems. Note that this can get kinda complex. See slasv2.f, IF( PMAX.EQ.1 ) $ TSIGN = SIGN( ONE, CSR )*SIGN( ONE, CSL )*SIGN( ONE, F ) IF( PMAX.EQ.2 ) $ TSIGN = SIGN( ONE, SNR )*SIGN( ONE, CSL )*SIGN( ONE, G ) IF( PMAX.EQ.3 ) $ TSIGN = SIGN( ONE, SNR )*SIGN( ONE, SNL )*SIGN( ONE, H ) SSMAX = SIGN( SSMAX, TSIGN ) SSMIN = SIGN( SSMIN, TSIGN*SIGN( ONE, F )*SIGN( ONE, H ) ) Note that this is, depending on how you count, either 3 or 11 sequential copysign-of-one-and-mult operations.
Confirmed.
Author: tnfchris Date: Tue Aug 8 13:15:44 2017 New Revision: 250956 URL: https://gcc.gnu.org/viewcvs?rev=250956&root=gcc&view=rev Log: 2017-08-08 Tamar Christina <tamar.christina@arm.com> Andrew Pinski <pinskia@gmail.com> PR middle-end/19706 * internal-fn.def (XORSIGN): New. * optabs.def (xorsign_optab): New. * tree-ssa-math-opts.c (is_copysign_call_with_1): New. (convert_expand_mult_copysign): New. (pass_optimize_widening_mul::execute): Call convert_expand_mult_copysign. Modified: trunk/gcc/ChangeLog trunk/gcc/internal-fn.def trunk/gcc/optabs.def trunk/gcc/tree-ssa-math-opts.c
Author: tnfchris Date: Tue Aug 8 13:17:41 2017 New Revision: 250957 URL: https://gcc.gnu.org/viewcvs?rev=250957&root=gcc&view=rev Log: 2017-08-08 Tamar Christina <tamar.christina@arm.com> PR middle-end/19706 * config/aarch64/aarch64.md (xorsign<mode>3): New optabs. * config/aarch64/aarch64-builtins.c (aarch64_builtin_vectorized_function): Added CASE_CFN_XORSIGN. * config/aarch64/aarch64-simd-builtins.def: Added xorsign BINOP. * config/aarch64/aarch64-simd.md: Added xorsign<mode>3. gcc/testsuite/ 2017-08-08 Tamar Christina <tamar.christina@arm.com> * gcc.target/aarch64/xorsign.c: New. * gcc.target/aarch64/xorsign_exec.c: New. * gcc.target/aarch64/vect-xorsign_exec.c: New. Added: trunk/gcc/testsuite/gcc.target/aarch64/vect-xorsign_exec.c trunk/gcc/testsuite/gcc.target/aarch64/xorsign.c trunk/gcc/testsuite/gcc.target/aarch64/xorsign_exec.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/aarch64/aarch64-simd.md trunk/gcc/config/aarch64/aarch64.md trunk/gcc/testsuite/ChangeLog
(In reply to Tamar Christina from comment #3) > Author: tnfchris > Date: Tue Aug 8 13:17:41 2017 > New Revision: 250957 > > URL: https://gcc.gnu.org/viewcvs?rev=250957&root=gcc&view=rev > Log: > 2017-08-08 Tamar Christina <tamar.christina@arm.com> > > PR middle-end/19706 > * config/aarch64/aarch64.md (xorsign<mode>3): New optabs. > * config/aarch64/aarch64-builtins.c > (aarch64_builtin_vectorized_function): Added CASE_CFN_XORSIGN. > * config/aarch64/aarch64-simd-builtins.def: Added xorsign BINOP. > * config/aarch64/aarch64-simd.md: Added xorsign<mode>3. > > gcc/testsuite/ > 2017-08-08 Tamar Christina <tamar.christina@arm.com> > > * gcc.target/aarch64/xorsign.c: New. > * gcc.target/aarch64/xorsign_exec.c: New. > * gcc.target/aarch64/vect-xorsign_exec.c: New. > > > Added: > trunk/gcc/testsuite/gcc.target/aarch64/vect-xorsign_exec.c > trunk/gcc/testsuite/gcc.target/aarch64/xorsign.c > trunk/gcc/testsuite/gcc.target/aarch64/xorsign_exec.c > Modified: > trunk/gcc/ChangeLog > trunk/gcc/config/aarch64/aarch64-simd.md > trunk/gcc/config/aarch64/aarch64.md > trunk/gcc/testsuite/ChangeLog I would have put these testcases into gcc.dg/vect and added a target_supports_vect_xorsign so that other targets had a fighting chance of catching such changes. Is this pattern relevant to AArch32 for instance ? If so I'd like to add those patterns there for bonus points ... I suspect the drotg testcase is fixed up by this . If so this bug should then be closed out as the mid-end has support for it. I'm not clear if slasv2.f is worth looking at further as another example.
(In reply to Ramana Radhakrishnan from comment #4) > > I would have put these testcases into gcc.dg/vect and added a > target_supports_vect_xorsign so that other targets had a fighting chance of > catching such changes. Except for the execution tests, the rest are way too AArch64 specific as they scan the generated assembly. I could however write a generic mid-end one I think to check for the internal function. > > Is this pattern relevant to AArch32 for instance ? If so I'd like to add > those patterns there for bonus points ... Yeah AArch32 would benefit some as well. So fair enough, I'll add it there too. > > I suspect the drotg testcase is fixed up by this . If so this bug should > then be closed out as the mid-end has support for it. I'm not clear if > slasv2.f is worth looking at further as another example. Indeed this does fix drotg for targets that implement the optab, the slasv2 is interesting as it does point out one issue which is combining XORSIGN and COPYSIGN calls in the same chain produces suboptimal code.
Author: tnfchris Date: Wed Aug 23 11:32:47 2017 New Revision: 251303 URL: https://gcc.gnu.org/viewcvs?rev=251303&root=gcc&view=rev Log: 2017-08-23 Tamar Christina <tamar.christina@arm.com> PR middle-end/19706 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Fix single-use check. Modified: trunk/gcc/ChangeLog trunk/gcc/tree-ssa-math-opts.c
Author: tnfchris Date: Wed Aug 23 11:34:59 2017 New Revision: 251304 URL: https://gcc.gnu.org/viewcvs?rev=251304&root=gcc&view=rev Log: 2017-08-23 Tamar Christina <tamar.christina@arm.com> PR middle-end/19706 * doc/sourcebuild.texi (Other hardware attributes): Document xorsign. gcc/testsuite 2017-08-23 Tamar Christina <tamar.christina@arm.com> PR middle-end/19706 * gcc.dg/tree-ssa/pr19706.c: New. * lib/target-supports.exp (check_effective_target_xorsign): New. Modified: trunk/gcc/ChangeLog trunk/gcc/doc/sourcebuild.texi trunk/gcc/testsuite/ChangeLog trunk/gcc/testsuite/lib/target-supports.exp
Author: aldyh Date: Wed Sep 13 16:40:39 2017 New Revision: 252346 URL: https://gcc.gnu.org/viewcvs?rev=252346&root=gcc&view=rev Log: 2017-08-08 Tamar Christina <tamar.christina@arm.com> Andrew Pinski <pinskia@gmail.com> PR middle-end/19706 * internal-fn.def (XORSIGN): New. * optabs.def (xorsign_optab): New. * tree-ssa-math-opts.c (is_copysign_call_with_1): New. (convert_expand_mult_copysign): New. (pass_optimize_widening_mul::execute): Call convert_expand_mult_copysign. Modified: branches/range-gen2/gcc/ChangeLog branches/range-gen2/gcc/internal-fn.def branches/range-gen2/gcc/optabs.def branches/range-gen2/gcc/tree-ssa-math-opts.c
Author: aldyh Date: Wed Sep 13 16:40:52 2017 New Revision: 252347 URL: https://gcc.gnu.org/viewcvs?rev=252347&root=gcc&view=rev Log: 2017-08-08 Tamar Christina <tamar.christina@arm.com> PR middle-end/19706 * config/aarch64/aarch64.md (xorsign<mode>3): New optabs. * config/aarch64/aarch64-builtins.c (aarch64_builtin_vectorized_function): Added CASE_CFN_XORSIGN. * config/aarch64/aarch64-simd-builtins.def: Added xorsign BINOP. * config/aarch64/aarch64-simd.md: Added xorsign<mode>3. gcc/testsuite/ 2017-08-08 Tamar Christina <tamar.christina@arm.com> * gcc.target/aarch64/xorsign.c: New. * gcc.target/aarch64/xorsign_exec.c: New. * gcc.target/aarch64/vect-xorsign_exec.c: New. Added: branches/range-gen2/gcc/testsuite/gcc.target/aarch64/vect-xorsign_exec.c branches/range-gen2/gcc/testsuite/gcc.target/aarch64/xorsign.c branches/range-gen2/gcc/testsuite/gcc.target/aarch64/xorsign_exec.c Modified: branches/range-gen2/gcc/ChangeLog branches/range-gen2/gcc/config/aarch64/aarch64-simd.md branches/range-gen2/gcc/config/aarch64/aarch64.md branches/range-gen2/gcc/testsuite/ChangeLog
Author: aldyh Date: Wed Sep 13 17:22:25 2017 New Revision: 252542 URL: https://gcc.gnu.org/viewcvs?rev=252542&root=gcc&view=rev Log: 2017-08-23 Tamar Christina <tamar.christina@arm.com> PR middle-end/19706 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Fix single-use check. Modified: branches/range-gen2/gcc/ChangeLog branches/range-gen2/gcc/tree-ssa-math-opts.c
Author: aldyh Date: Wed Sep 13 17:22:37 2017 New Revision: 252543 URL: https://gcc.gnu.org/viewcvs?rev=252543&root=gcc&view=rev Log: 2017-08-23 Tamar Christina <tamar.christina@arm.com> PR middle-end/19706 * doc/sourcebuild.texi (Other hardware attributes): Document xorsign. gcc/testsuite 2017-08-23 Tamar Christina <tamar.christina@arm.com> PR middle-end/19706 * gcc.dg/tree-ssa/pr19706.c: New. * lib/target-supports.exp (check_effective_target_xorsign): New. Modified: branches/range-gen2/gcc/ChangeLog branches/range-gen2/gcc/doc/sourcebuild.texi branches/range-gen2/gcc/testsuite/ChangeLog branches/range-gen2/gcc/testsuite/lib/target-supports.exp
GCC 8.1 has been released.
GCC 8.2 has been released.
GCC 8.3 has been released.
GCC 8.4.0 has been released, adjusting target milestone.
So is this fixed now in 8.x?
Issue was still open because of AArch32 support, but we had concluded it's difficult to get efficient codegen on AArch32 for this so we are leaving it.