Bug 56442 - postreload uses content of clobbered register
Summary: postreload uses content of clobbered register
Status: NEW
Alias: None
Product: gcc
Classification: Unclassified
Component: rtl-optimization (show other bugs)
Version: 4.7.2
: P3 normal
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords: wrong-code
Depends on:
Blocks: 56183
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Reported: 2013-02-25 08:42 UTC by Pitchumani
Modified: 2024-01-18 09:55 UTC (History)
2 users (show)

See Also:
Host:
Target: avr
Build:
Known to work:
Known to fail:
Last reconfirmed: 2013-02-25 00:00:00

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Description Pitchumani 2013-02-25 08:42:11 UTC 
Wrong code is generated for avr target when gcc-4.7.2 is used.

Test case: dejagnu test gcc.dg/var-expand2.c
command line options: -O2 -funroll-loops -ffast-math -mmcu=atxmega128b1

(snip of assembly)
ldi r24,lo8(array+4)
ldi r25,hi8(array+4)
sub r14,r24
sbc r15,r25
lsr r15
ror r14
lsr r15
ror r14
ldi r25,3		;; r25 is overwritten
and r14,r25
clr r15
lds r18,array
lds r19,array+1
lds r20,array+2
lds r21,array+3
movw r28,r24	;; register pair r24/r25 is used
(snip of assembly)

conversation on mailing list:
http://gcc.gnu.org/ml/gcc/2013-02/msg00264.html
Comment 1 Pitchumani 2013-02-25 08:43:22 UTC 
(In reply to comment #0)
> Wrong code is generated for avr target when gcc-4.7.2 is used.
> 
> Test case: dejagnu test gcc.dg/var-expand2.c
> command line options: -O2 -funroll-loops -ffast-math -mmcu=atxmega128b1

-mmcu=atxmega128a1
Comment 2 Georg-Johann Lay 2013-02-25 10:56:02 UTC 
Enabling others to understand this...

In .reload dump, we have correct code:

(insn 418 417 113 3 (set (reg:HI 24 r24)
        (const:HI (plus:HI (symbol_ref:HI ("array") [flags 0x2]  <var_decl 0x1e405a0 array>)
                (const_int 4 [0x4])))) 32 {*movhi}
     (nil))

(insn 113 418 114 3 (set (reg:HI 14 r14 [94])
        (minus:HI (reg:HI 14 r14 [94])
            (reg:HI 24 r24))) 65 {subhi3}
     (nil))

(insn 114 113 115 3 (set (reg:HI 14 r14 [94])
        (lshiftrt:HI (reg:HI 14 r14 [94])
            (const_int 2 [0x2]))) 217 {lshrhi3}
     (nil))

(insn 115 114 118 3 (parallel [
            (set (reg:HI 14 r14 [94])
                (and:HI (reg:HI 14 r14 [94])
                    (const_int 3 [0x3])))
            (clobber (reg:QI 25 r25))
        ]) 175 {andhi3}
     (nil))

(insn 118 115 119 3 (set (reg:SF 18 r18 [orig:65 D.1335 ] [65])
        (mem:SF (symbol_ref:HI ("array") [flags 0x2]  <var_decl 0x1e405a0 array>) [2 MEM[base: D.1358_18, offset: 0B]+0 S4 A8])) foo.c:15 37 {*movsf}
     (nil))

(insn 119 118 122 3 (set (reg:HI 28 r28 [orig:96 ivtmp.10 ] [96])
        (const:HI (plus:HI (symbol_ref:HI ("array") [flags 0x2]  <var_decl 0x1e405a0 array>)
                (const_int 4 [0x4])))) 32 {*movhi}
     (expr_list:REG_EQUAL (const:HI (plus:HI (symbol_ref:HI ("array") [flags 0x2]  <var_decl 0x1e405a0 array>)
                (const_int 4 [0x4])))
        (nil)))


This is changed by .postreload to:


(insn 119 118 122 3 (set (reg:HI 28 r28 [orig:96 ivtmp.10 ] [96])
        (reg:HI 24 r24)) 32 {*movhi}
     (expr_list:REG_EQUAL (const:HI (plus:HI (symbol_ref:HI ("array") [flags 0x2]  <var_decl 0x1e405a0 array>)
                (const_int 4 [0x4])))
        (nil)))


This is wrong because reg:HI 24 is (partly) clobbered by insn 115 and thus reg:HI 24 must not be used past insn 115.

Component is not target, the target description of andhi3 insn is all right.

According to S, the bad transformation happens in: postreload.c:reload_cse_move2add()
Comment 3 Richard Biener 2014-06-12 13:52:48 UTC 
Unsetting target milestone of open non-regression bug from version of branch being closed.
Comment 4 Georg-Johann Lay 2024-01-18 09:55:14 UTC 
Maybe this is similar to PR101188.